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Verilog-2001 added the much acclaimed @* combinational sensitivity list. The primary intent of this enhancement6 ?$ f" d/ t& h4 U! i
was to create concise, error-free combinational always blocks. The @* basically means, "if Synopsys DC wants the
1 q+ l+ t) x9 c" Z! P5 pcombinational signal in the sensitivity list, so do we!"
( u' v x5 _$ S. V' g' [5 s' _Example 1 and Example 2 show the Verilog-1995 and Verilog-2001 versions respectively of combinational; @$ v7 o3 u4 l( K9 c
sensitivity lists for the combinational always block of any of the three always block fsm1 coding styles.
# e; t/ s9 E2 {/ m m6 U0 f" C' |/ S* z1 M' |
always @(state or go or ws)% ?/ V3 }! w0 B
begin
5 F a1 L9 }- H* g8 S. H }...6 c( L6 J6 ?. p! f. J5 f# k7 A
end0 ~1 b# Z; E- a" p
//Example 1
/ Y, ?3 O, n- k5 ?1 b6 m6 K# i. a" n3 x6 H7 V. o
9 m; ^( O- L! c& ~' Lalways @*0 l& V4 Z! u0 u: p6 O c
begin
- L3 o: y/ p, B% }. C5 ~...% @: Z* B0 |- Z4 G F
end$ m; H, m/ j5 M- w
//Example 2" p O* n3 h0 a4 L7 a* p
" `/ T& o- |' L+ g% [+ [" l
The @* combinational sensitivity list as defined in the IEEE Verilog-2001 Standard can be written with or without
/ `$ _% z* o0 p8 l4 Cparentheses and with or without spaces as shown in Example 3. Unfortunately (* is the token that is used to open7 O& B T) r( d- U4 B9 B1 j
a Verilog-2001 attribute, so there is some debate about removing support for all but the always @* form of this# r C$ t* h0 X- U3 |& j
combinational sensitivity list. In-house tools would probably also be easier to write if the in-house tools did not& t) i# `+ ]% c4 Z, A$ ]) B
have to parse anything but the most concise @* form. For these reasons, I recommend that users restrict their usage
: w) J$ A* i' p M/ O4 V& ` Wof the combinational sensitivity list to the @* form.
# [8 A2 n) H: u1 Y! [, Qalways @*( K5 Q( ^0 a* I. D: x: R
always @ *
6 w3 P5 x( n: @3 F. X) ~7 ]; Halways @(*)8 F: z# Y3 T: C% M7 z4 C; k
always @ ( * )+ m6 ~$ e B: j; C, V
//Example 3 |
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