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Verilog-2001 added the much acclaimed @* combinational sensitivity list. The primary intent of this enhancement- i! t! f; q" h6 Z/ u
was to create concise, error-free combinational always blocks. The @* basically means, "if Synopsys DC wants the
4 X9 a* }$ b3 a2 B0 T2 ~0 D* ?combinational signal in the sensitivity list, so do we!": ]3 }% x$ p7 m1 k. |* n; M
Example 1 and Example 2 show the Verilog-1995 and Verilog-2001 versions respectively of combinational
# N, k: b8 J+ z! J( J* J" xsensitivity lists for the combinational always block of any of the three always block fsm1 coding styles.
# D6 w3 ?% ^5 ^' V9 ?7 m
J9 ]8 J d; P, ualways @(state or go or ws)
) h" \1 t( J' kbegin' v6 O9 c- g! [
...
' r6 L+ h& H6 o8 e$ `end
; T% k0 `# U5 y8 _1 \2 @//Example 1" D8 [4 \* H4 ^4 B/ z$ Z- d3 e
% j' `' G, m0 y" d( o+ P9 B; u7 }% I# F1 T( ~9 Q. A: y
always @*
* D' b c, ]& n2 }begin
" y8 H; G$ l2 E; {+ t$ }7 g, W...
* \$ \) p! Y& Z1 n3 Tend3 P4 ]2 ]; Y" e
//Example 2( x- v5 \! G5 Y2 d
! e5 f7 h1 @, H: M L% B
The @* combinational sensitivity list as defined in the IEEE Verilog-2001 Standard can be written with or without2 v" B2 Y7 t) W5 S' q8 k" T
parentheses and with or without spaces as shown in Example 3. Unfortunately (* is the token that is used to open8 v/ k3 U6 Y! X
a Verilog-2001 attribute, so there is some debate about removing support for all but the always @* form of this
4 I" B! ?) W. b3 J$ M% ^4 xcombinational sensitivity list. In-house tools would probably also be easier to write if the in-house tools did not
" @+ r" Y9 a! @& f& L0 i4 Uhave to parse anything but the most concise @* form. For these reasons, I recommend that users restrict their usage' n3 t7 e5 g; \3 O* P
of the combinational sensitivity list to the @* form.
& a" t0 M( A. J3 Ralways @*
$ c' F9 p) x$ R7 S F0 valways @ *
8 Q" O+ M1 Z* c: [& l' [4 h! Oalways @(*)
: V2 [" F# B% _! Q, i' Qalways @ ( * )
" @, o7 S; n) Q0 Y# \' K! a$ t//Example 3 |
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