Sansen讀書會...

賴永諭

slide 154
- I3 T/ G7 |# JA gain of 1000 is expected.
' p7 v, p  W3 q, s; h=>應該是 A gain of 100 is expected.

賴永諭

Slide1524:
3 O; ?- L1 b4 |# y% M# G8 |3 m/ i( jSlide 0128 Vout/ic=1/2gm3ro1
* g: n1 V3 x2 Y' D% q& F
補充內容 (2019-1-8 11:06 AM):
Slide1524: iout/ic=1/2gm3ro1
' u3 L, n7 I, }" y) y
補充內容 (2019-1-8 11:08 AM):
Slide1525: iout/Vinc=1/RB*1/2gm3ro1

賴永諭

Slide 1312:
+ Q' |5 N: B7 \; v$ \+ ~7 D% rInput shunt: Current mixing輸入電阻變小
0 k& D" D* f/ ]! OInput series: Voltage mixing輸入電阻變大
( g: M3 A4 s  f2 y! ~Output shunt: Voltage sampling輸出電阻變小
Output series: Current sampling輸出電阻變大
: t5 d; A0 z( `. N0 ]

賴永諭

slide 0731
  `7 o2 W; l7 z5 D! `2 g3 P. x. ^需要4各bias 點~
% U- h6 X: P+ G2 f3 J1 l
8 k7 [. |, i% Lside 0732
只需要3各bias 點~
M2 D 端的極點比slide更遠

賴永諭

slide 097
It is the output gm3 divided by the load capacitance CL. It is normally set at two to three times the GBW
depending on the phase margin required.
=> 更正
% z3 t1 X2 `, i( t3 FIt is the output gm2 divided by the load capacitance CL. It is normally set at two to three times the GBW
depending on the phase margin required.

賴永諭

賴永諭 發表於 2010-7-13 03:49 PM
回復 32# tuza2000

上面說明有誤～
! h1 H$ _6 }4 ^實際上左邊diode connect pmos gate 與右邊M6相接

賴永諭

Slide 0346: Input M2 base, OUT M3 base(Series- Series feedback)
: d9 f4 q5 v+ u+ nCurrent sampling, Voltage mixing; 增加輸出電阻, 減少輸入電阻
所以Rm增加beta

賴永諭

Slide 2264: gm max=1/2(W*C1*C1/C3)
2 B7 ?5 S! Y7 P! `2 ^/ R9 yRef: silde2219
# `5 U4 |  Z$ D0 g+ \Start-up of oscillation 可知

賴永諭

Slide 025
Noise will be explain in detail in Chapter 4.

賴永諭

slide 0444
Noise of a current mirror with series R:
- I$ S6 I' `! M9 F4 C( J7 f+ ^前面的R小於1/gm時, 為什麼iout noise 隨的電阻增加而變大?!
. R$ m  g0 |/ y' p; k還是只是示意圖來說明, 此時的電晶體noise 是大於電阻的noise~~~
) S5 B# S6 r- ]; K謝謝~~幫忙回附一下
$ r) S" P- e7 o5 i8 I1 c2 f2 M2 E  W

賴永諭

slide 0513
分享一下~~這張Gain bandwidth說明如下
" f( {8 ~6 D# N' S" r5 S1. 當接成回授時beta=1, 其-3dB 點的頻率就是loop gain =1 的頻率。
2. DC gain*-3dB bandwidth=GBW。
3. 當接成回授時, ex: beta=1/2時, 其DC gain=1/beta; -3dB bandwidth=GBW*beta, 只代表在這個-3dB bandwidth頻率下, gain 最多掉3dB, 並不是在這個bandwidth 下 所有頻率的gain 都是1/beta；只有DC gain=1/beta。

賴永諭

slide 0513
3 f) f; ?/ K2 @. W; B$ y0 m分享一下~~這張Gain bandwidth說明如下
1. 當接成回授時beta=1, 其-3dB 點的頻率就是loop gain =1 的頻率。
3 C% j# c+ v( W+ d; f% j2. DC gain*-3dB bandwidth=GBW。
  Q+ z* r( [! G3 F& f0 I2 V6 F% r3. 當接成回授時, ex: beta=1/2時, 其DC gain=1/beta; -3dB bandwidth=GBW*beta, 只代表在這個-3dB bandwidth頻率下, gain 最多掉3dB, 並不是在這個bandwidth 下 所有頻率的gain 都是1/beta；只有DC gain=1/beta。

賴永諭

slide 2222
( U4 m7 R- S( s/ tVerify that RB>1/(RsC3^2Ws^2)
9 L; g% y$ Y" s) T; }6 a4 s# ]
4 ^  f/ ^. Z3 K  M4 [" @* K3 D# H7 D=>說明如下, cmos 負電阻~gmA/Ws^1C1C2
用RB 來biasing 應該要大於1/gmA 電阻
" U. r6 A+ }% O& v+ R所以RB應該大於1/(RsC1^2Ws^2)

賴永諭

slide 2222
$ _* U1 s8 r1 |; Z% i7 \! BVerify that RB>1/(RsC3^2Ws^2)
1 ^: f" s! f" Q3 q! r' ?# l$ J
=>說明如下, cmos 負電阻~gmA/Ws^1C1C2
/ Z1 x/ h" f6 x! K" d7 m3 W* m  n用RB 來biasing 應該要大於1/gmA 電阻
所以RB應該大於1/(RsC1^2Ws^2)
) L: Q. d  t' s, g# u- H

賴永諭

slide 2222
Verify that RB>1/(RsC3^2Ws^2)
9 l% V: R' m+ E
( A- F% ^) t+ j+ v; M=>說明如下, cmos 負電阻~gmA/Ws^1C1C2
用RB 來biasing 應該要大於1/gmA 電阻
  _# H( t1 e1 M8 L所以RB應該大於1/(RsC1^2Ws^2)

賴永諭

slide 2222
Verify that RB>1/(RsC3^2Ws^2)

0 q0 K* D% W/ [9 B=>說明如下, cmos 負電阻~gmA/Ws^1C1C2
用RB 來biasing 應該要大於1/gmA 電阻
所以RB應該大於1/(RsC1^2Ws^2)
/ E! r: a+ Z5 _* {; \# l# ^/ s, ^% R' j

賴永諭

slide 2264 Calculation of gmA

7 n' s7 c3 c7 b! R( Y( Zgmmax 應該是C1WC1/2C3

=>ther/2=gmax/(Ceff x ws)^2可推算出來

賴永諭

賴永諭 發表於 2024-3-4 04:01 PM
slide 2222
, X9 V' E& A1 G7 G1 c2 `Verify that RB>1/(RsC3^2Ws^2)

5 S7 [: R4 Z5 m8 |7 k" v% U0 |6 x" vgmA~ 4RsCL^2Ws^2
4 X: \8 H8 j6 U  I" I& t" Land 4WsCL^2/QCS
& Y/ L$ J$ X- m9 v( P
' |/ g0 b' m, ^/ h; h

賴永諭

RIP

In Memoriam : Willy Sansen (1943-2024)
3 s9 V# w& _& P0 I; j+ L1 N0 y5 g
https://bbs.eetop.cn/thread-968254-1-1.html

賴永諭

Design of Crystal Oscillators
6 N5 u- w" ~/ Z0 g1 Sslide 2255補充資料：Two stage ring oscillator analysis
. _- [) u" e6 B, A' r4 {' a
! L! Z% a* Z* V9 lhttps://drive.google.com/file/d/ ... Hq/view?usp=sharing