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Senior Physical Design Engineer
# R/ r4 D2 ^; c# g8 D公 司:A famous IC company3 E5 F9 B& s ]
工作地点:南京. a% H; l: s) L" K7 M
+ X* y8 `, I4 O+ G0 Z* G1 DKey Responsibilities 3 [& M6 J" X% X9 u3 K m4 \
Depending on experience, key responsibilities will involve some of the following:
( d" V# B n5 g5 ]: W3 R' c3 AIC implementation from netlist to gdsii, with synthesis, floorplanning, place and route, timing closure, and physical verification.
% `, B0 E2 `0 P% B, jAs a key member of physical design team, your will work on one of most advanced and the most complex chip designed. " A5 D A" d3 T8 C8 J7 Y
Leading a team of physical design engineers and resolving the technical related issues. . D6 M2 | r8 e& z) v: p
Crosstalk analysis, power analysis, and static timing analysis.
, |" ~: ~3 N* q8 }# o( q1 |& Z4 K% }4 RWrite scripts in Tcl to improve productivity. 2 i( c4 a( \/ U. F$ _6 L8 ?
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Experience: 5+ years in physical implementation engineering 6 |; H& R$ @' j) k/ O
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Essential skills
) A5 H2 H" q) _, V1 m% t, _MS in EE required.&#8226roven track records of working independently on place-and-route project running and DRC/LVS/ERC/Antenna debugging skills 9 K1 z" @8 J, E! L
Experience with Magma or Synopsys place-and-route tool set and physical design project implementation. ( N4 K8 V. N. e8 g2 p: q% n: [# \# y* Y
Good programming skill. Capable of writing Tcl or Perl. 5 O. y/ d: I: Q! e2 {! W T
Familiar with synthesis, static timing analysis. $ v7 O' S ^, ~0 f
Self-motivated team worker, good verbal and written communication skills in English. / V5 N8 c) a/ c; Y1 Q" Q
Technical and team leadership proffered. Previous management experience highly desired. & D% H6 w4 @( _2 D
Experience with synthesis, DFT, and verification is preferred. |
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