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招聘公司:A famous IC company
: W3 q( ?, t1 N1 y) q招聘岗位:ASIC CAD Engineer( w1 u9 r1 T1 r( @7 X: J3 Z$ S# c
工作地点:Shanghai
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t6 n: n! k8 @& ^* z1 v岗位描述Description of the Role / Responsibilities:
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Participate in the design and implementation of the leading edge ASIC chip.
* V$ f. G5 K1 n) f: \- a9 v8 qYour focus is on design flow : \5 ?$ C5 {2 ^( l
Ensure the design methodology correct and improve automation and productivity. The main flow steps include: % Q2 |1 w8 _0 F- h1 ~
FE: Synthesis, Simulation, STA, Design Check and memory compiler etc. M' K7 V, u$ s* |. o: ?
BE: Place and Routing, Physical verification, Signal integrity, Power analysis etc. , V1 n4 o& ?( ?& K
Another important part of the job is doing support to FE /BE team. 5 q4 Z0 f7 {( a; ^& u- F/ G8 W
When they have a real design issue and can’t solved by themselves, you may be asked to jump in for debug and find a solution. Usually you will work with EDA vendors on such case. $ s; h7 K b& a
Responsibilities besides support project work also include interfacing with other implementation experts across different development locations, and driving the continuous improvement of advanced implementation methods to Trident digital TV and Set-Top-Box projects teams.
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7 F+ r x& S5 }' L职位要求Experience and Skills Required:
: G9 P/ Y5 j6 e8 B) u$ [+ ]Essential
5 w) h& b/ G9 q1 i: @; p3 ]Major in Electronic Engineering or Computer Science. & X+ N- u: K2 I' [- H3 _' X1 w
Master (or Bachelor 2+ years related experience) , F2 p3 Q" o d2 s& I8 ^; n B
Strong programming skill with one or more following items( Perl,Tcl, C/C++ etc).$ t2 t: P* I" | t# `8 C6 ^ }
Experience with industry standard development EDA tools and flow.
2 K& b" D- `8 p: SFE engineer: DC, RTL Compiler, PT, Conformal LEC, NC. VCS
( H; u" I: C: b6 p6 B! s9 iBE engineer: SOC encounter, Apache Redhawk etc. % O+ |( k8 R0 P* d, d( t
Good written and fluent oral English. ) l! V: R! ]; [
Good communication skills and team work.
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Desirable
3 A: k+ E% S/ L. e" p& h& L0 TReal ASIC project experience as a FE or BE designer is a plus. |
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