關於ESD input and output pin 保護電路設計

wes777

Per my experience ,Diodes + RC-Control , inverter and PowerClamp is better for out pad
+ q+ V' \) t' n1 L( i- `* T5 @- NGenerally speaking ,the root cause of ESD failed is from below.
2 O) Z; @& z/ b<i>clamp NMOS's ability.
- K$ W, L7 L) d9 N- Q4 Q: L" G<ii>clamp NMOS's turn-on rate.
$ ~' Y( G: a) [5 y! j1 v<iii>Not follow design rule.......................
  d& H5 m( ~3 P0 N1 g2 }As we know ,RC-control is to keep clamp NMOS off when IC is on normal operation.(us)
& {% v; f" B, _+ }4 J8 k5 O% \/ kWhen sufferred ESD pulse(ns),GGNMOS be turned on by coupling .
/ z, r" q7 C9 e# N3 j- d4 I/ {: ?If adding inverter between RC and clamp NMOS,it will speed up clamp NMOS turned on.
- N# w( ?* b4 HJust for reference !!!

averyer

謝謝大大的分享~更加了解esd的重要性

despair

如果在輸出端加CDM，那輸出端的ESD MOS等於白做
* A+ z! i# k, r
一般CDM diode size相較ESD MOS size來說小的多
4 v5 w, A4 O6 l; F. Y( b% c如果同時加上CDM diode，肯定會先死在CDM diode上。

vincentron

谢谢诸位的分享，

chrish2012

回復 20# ihcnqkm
& t* p1 i, X; e5 b4 `* T( {4 v& W
7 f. z; x: h) j
4 i3 O) Z) }4 [! s. {5 o    很有用啊 ~谢谢各位的提点

tuza2000

学习学习！！！！！！

sxb841018

学习了，谢谢大家啊~~~~~~~~~~~~~~

szona44250

感謝大大的分享，受益無窮

謝謝