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In order to save test device, usually will do Power to Ground then IO to Power/Ground and the last is Io to IO. * t; E& K3 K1 _( m. r2 }) q2 ~! S5 [ U$ @
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The reason is:
' o& i" V2 i5 o3 [. j1. If power to ground can not pass, the rest combination has less chance to pass, t; w1 s. X7 k) K$ B
2. Usually power pin count is less than IO pin count. It is fast to get an idea how the chip's ESD level( C2 H! l% k' R9 y' @3 D5 C
3. If failed, it's easy to find the failed ESD zapping combination |
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