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In order to save test device, usually will do Power to Ground then IO to Power/Ground and the last is Io to IO. 2 s" y V' _3 o A
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The reason is:
4 ?( @6 q0 t; H! F% P1 ]1. If power to ground can not pass, the rest combination has less chance to pass
4 x5 ?5 o5 C( c3 g6 h8 U, C2. Usually power pin count is less than IO pin count. It is fast to get an idea how the chip's ESD level
9 K v# r* N9 }9 Y0 A4 ?$ I ]3. If failed, it's easy to find the failed ESD zapping combination |
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