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In order to save test device, usually will do Power to Ground then IO to Power/Ground and the last is Io to IO.
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. a' J3 H2 k# m+ f7 ~% r8 FThe reason is:% l! U, n5 Q" Q2 _6 |
1. If power to ground can not pass, the rest combination has less chance to pass
: a5 g7 O$ o, c7 c" l7 b) w2 N2. Usually power pin count is less than IO pin count. It is fast to get an idea how the chip's ESD level
) Z4 Z, G" {9 l% A3 h3 n# N; g3. If failed, it's easy to find the failed ESD zapping combination |
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