A famous IC company looking for Analog IC circuit design

ranica

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招聘公司：A famous IC company
( ^: X: `' _" E, o8 n工作地点：Beijing
岗位描述：
· Analog IC circuit design, simulation and verification
· Design analog products and blocks such as high current or high capacitive load output drivers, operational amplifier, comparator, voltage reference, oscillator, error amplifier, voltage regulator etc.
4 D  P+ A6 _4 r" `& x  w6 e· Design of the switching power IC, DC-DC converters, for mobile/portal application
" \' c5 o) q+ z( w) P· Evaluation, simulation and analysis of power architectures and circuit topologies
$ ]1 _3 }) A" S3 r9 m  W  X0 x· IC layout including floor planning, DRC, LVS, and LPE
· Work with application and testing engineers to define optimal characterization and testing solution
+ p$ H5 `8 U$ K; g# o$ w· Work with product definers and product engineers in full product development flow
职位要求：
Experience Required
· Minimum 5 years direct DC-DC IC design experience, with MSEE or above degree
2 W4 t3 B% q5 Q$ N) Q/ x· Strong knowledge in analog CMOS and Bipolar IC design
· Working direct experience with switching power supplies, DC-DC converters, Battery charger, and their various topologies
5 n1 R) G2 o2 n0 A& R6 @· Theoretical understanding of the power electronics, switching power supply topologies
+ Q: c% Q; M5 d& K4 W· Prior experience with power management related IC design a strong plus
· Knowledge in analog IC layout
· Matlab/Simulink/VerilogA or other behavioral simulation expertise a plus
+ w$ a8 {! q" L8 E' F8 Z' q· Excellent written and oral communication and presentation skills
· Satisfactory written and oral communication skills in English
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Education Required
$ N2 `; a" Z3 [7 d& Y MSEE degree or above or equivalent experience

Other
1 F/ v7 ^) l. r$ d5 I Strong communications skills; written, verbal, presentation and listening;
Good interpersonal skills to work in a team environment;
Good command of written and spoken English required;
# N* r* e# U! A& F9 `; Z Excellent interpersonal, written communication and presentation skills
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7 W  {$ o3 L* X. Z% A0 N* D* A能者與意者請 email resume 與chip123聯絡。

ranica

招聘公司：NO.14-A famous IC company
" I! \- M6 t( x: ]% Z招聘岗位：Analog Layout Engineer
' b% a* q3 c+ r1 Z2 f工作地点：Shanghai
% J6 p1 z/ n: f! p; f3 V岗位描述：We expect the engineer to work mainly on analog custom layout design. Help develop CAD capability and automate our design flow.

职位要求：
1. Education: a) Graduate from a well recognized university. b) Major in electronic/electrical engineering program is preferred, although other related programs might be acceptable. c) Bachelor degree is a must, master degree is preferred. 2. Work experience: a) Minimum 3 years layout work experience in a well recognized company. b) Experience in CMOS deep sub-micron process, like SMIC 90nm, TSMC 90nm, or bellow. 3. Skill: a) Virtuoso layout tool is preferred; other layout tool skill might be acceptable. b) Familiar with Calibre, or other physical verification tools. c) Good knowledge on CMOS device physics; certain knowledge on circuit theory. d) Unix/Linux. e) Good with Perl and other scripting languages f) Comfortable in communicating in English, both writing and speaking. 4. Other: a) Have the initiative to work on layout. b) Open mind to learning new things.

- C6 X' B/ H: a% M2 g4 j- i能者與意者請 email resume 與chip123聯絡。

ranica

招聘公司：A famous IC company
工作地点：Shanghai
岗位描述：Responsibility Responsible for chip/block level design and verification: micro architecture, RTL coding, simulation, verification strategies, test plans, test automation, system configuration, and environment setup.
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Education Bachelor or Master degree in Electrical Engineering or Computer science or related field. Experience Detail and discipline oriented, team work oriented Understanding of ASIC/FPGA design/verification flow Familiar with some of the EDA tool such as Verilog/VCS, Synthesis, Timing Analysis, DFT, FPGA is required Network protocol and system knowledge highly desirable (Ethernet, IP, ATM, SONET, DSL, EPON/GPON) Strong skill in C/C++ UNIX scripting is desired

& I+ z) w0 T# |4 E能者與意者請 email resume 與chip123聯絡。

ranica

招聘公司：A famous IC company
工作地点：Shanghai
: v$ A- \8 I/ ?% P) b9 @, ^职位要求：
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3+ years experience in ASIC design -> must · BS in Electrical Engineering (or equivalent) is a must have, MSEE is desired -> BSEE must, MSEE plus · Experience with WIFI or related wireless technology (i.e. WIMAX, 3G, LTE, etc.) desired -> plus · System on Chip (SOC) Integration Experience, including AHB/AXI, CPU integration -> plus · Experience with interfaces such as PCIe, Ethernet, DDR, USB -> plus · Working knowledge of networking protocols such as TCP/IP, 802.3, 802.11 -> must · Working knowledge of C programming language -> must · Experience with Medium Access protocols a plus -> plus · Must be expert in Verilog RTL language -> must · Must be familiar with the ASIC design flow from RTL through synthesis, including the tool flow. -> must · Verification experience – Verilog, System-Verilog, Coverage Analysis -> must for verification engineer, plus for design engineer · FPGA emulation experience -> plus · Chip bring-up experience, including use of Logic Analyzer and Oscilloscope for debugging -> plus
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能者與意者請 email resume 與chip123聯絡。

ranica

招聘公司：A famous IC company
# u/ d4 Z. `( e% f! p8 O" E工作地点：Shanghai
9 u6 v5 a2 t7 `) W8 T岗位描述：

Responsibilities 1. RF system design on schematic and PCB layout review, including critical component specification and part selection, RF chain margin calculation, device interconnection check, PCB EMI analysis and cross interference check. 2. Perform board level debug and testing including impedance matching (noise figure and gain for RX, power and efficiency for TX), device operating point optimization, RF calibration, 3GPP non-signaling/signaling testing target for GCF compliance. 3. Collaborate with core team engineers for specific issue logging, feedback, debugging and problem solving. 4. Provide technical support to customers and work with technical team and/or FAE for customer R&D projects.
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: \* \& E- @9 }1 E: J职位要求：
Required skills and experience 1. 5~10 years experience in cellular radio system design or testing 2. Understanding of general RF and microwave principles including Smith Chart, multi-port S-parameter calculation, transmission line theory and impedance matching etc. 3. Knowledge of RF circuit analysis including filter design, noise figure calculation, amplifier (LNA/PA) design, oscillators and mixers, phase lock loop design etc. 4. A good knowledge in RF components, such as RF transceiver, SAW, duplexer, LNA and RF switch. 5. Experienced in lab hands-on test fixture and prototype making and impedance matching and tuning 6. Knowledge and experience in RFIC characterization and test, understand principles of RF calibrations and device optimization. 7. Experience and knowledge of GSM/GPRS/EDGE/WCDMA phone development process and RF performance DVT steps. Familiar with compliance tests for GCF/PTCRB 8. Familiar with RF testing equipments, CMU200, Agilent 8960, network analyzer, spectrum analyzer, and signal generator. 9. A good working attitude. 10. Excellent oral and written communications and interpersonal skills' able to function effectively in a team environment. 11. Master degree in Electrical Engineering with a specialization in telecommunications 12. Knowledge of RF system link budget calculation, wave propagation, antenna modeling and design is a plus.
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' e' D1 `7 n: C5 ?$ U6 m1 \3 |& E. I! Y能者與意者請 email resume 與chip123聯絡。

ranica

招聘公司：A famous IC company
工作地点：Shanghai
& H* `- c7 a" B  }, G7 p岗位描述：

Summary: The primary objective of this role is to perform hardware tasks for the XX 32-bit ARM-based MCU product line. This includes design and manufacturing of the evaluation kits, reference designs, and functional validation of the products. You may also be involved in AT91 products support. You will be located in Shanghai and will work in close cooperation with the product application team located in France. Key responsibilities/duties: 1.Perform tasks of AT91SAM product functional validation, including validation plan writing, validation software and scripts development, validation implementation and validation report composition to validate the products functionality, performance, robustness and characteristics. 2.Perform tasks of AT91SAM based reference design projects, including specification writing, system design, schematic capture, PCB design review, manufacturing follow-up, prototype validation, production test package development, and project management, to provide industrial turn-key solution to the customer. 3.Perform tasks of AT91SAM Evaluation Kits projects, including specification writing, schematic design, PCB design review, manufacturing follow-up, prototype validation, kits production test package development, and project management, to provide professional evaluation and development kits to the customer. 4.Provide professional technical support to other teams with dedicated test boards, hardware debugging, and critical issue investigation, etc. to take responsibility of hardware related tasks of the application team. 5.Participate in customer support of all the AT91SAM products, including hardware design review, debugging, and critical issue investigation, etc. to revolve all the hardware issues from customer. 6.Write documents including application notes, technical articles, project documents, user guides, etc. to provide documentations to the application team.

7 |- X0 L+ t( p" X, S6 x) ?职位要求：
Requirements (indicate “must” or “preferred”) Key skills & knowledge (technical): 1.Must have rich experience on ARM microcontroller based product functional validation, including low level drivers of ARM on-chip and on-board peripherals’ functionalities, MCU performance and characteristics testing such as power consumption and timing; skill in SOC architecture design is a plus. 2.Must have proven experience in embedded system design based on ARM microcontrollers, including system definition, schematic design (ORCAD), PCB design (Allegro), prototype testing, etc. 3.Must have proven project management skills and experience, including planning, tracking and reporting. 4.Must be self-starter with the ability to proactively propose technically competent solutions, shall like to be result-oriented and shall manage time efficiently. 5.Must have strong understanding of digital and analog electronics fundamentals. 6.Preferred to have embedded system design experience in metering and smart grid industrial. Metrology knowledge is a plus. 7.Preferred experience in high speed digital design and mixed signal design. 8.Preferred knowledge of signal integrity, EMI/EMC; proficiency in Allegro SI Board or HyperLynx, Allegro AMS. 9.Preferred working experience in international environment. Language skills: English fluent – conversation, reading and writing Relevant Experience: 1.Minimum 6-year experience for bachelor and 3-year experience for master in embedded systems development and/or SOC validation. 2.Experience of writing technical documents in English. Qualifications: Bachelor or Master Degree in EE Natural talents (innate competencies/behaviour): Rigor and method Reactivity, self initiative Keen on technical investigation, good deductive reasoning Detail-oriented and pursuit of excellence Work well in a team environment Good communication skill

5 u/ ^0 x' O. O- I能者與意者請 email resume 與chip123聯絡。

ranica

招聘公司：A famous IC company
  ?7 F) }6 y  V工作地点：Shanghai

+ r' R( P& @0 D$ p岗位描述：
Job Summary As an Analog Mixed Signal Design Engineer you are member of one or our PMU product development teams that are defining and finalizing design solutions, from feasibility study to complete qualification and production. As a Mixed Signal Analog Design Engineer, you will be developing analog IP and analog blocks for energy & power management IC. These IPs are then integrated within IC & you play an important role in the mixed signal integrated circuits design. The role will cover the full IC design cycle from specification through to testing of engineering samples. Key Areas of Responsibility 1. Carry out development activities from design, verification to physical validation for mixed signal integrated circuits (Analog, power and digital blocks) for power management IC; - Accountable for proper execution (schedule) & quality of own design - Ensures integrity & documentation of own design 2. Interface with layout team, performing or providing guidance for layout design and controlling layout design and work quality; 3. Evaluate the product with application team to meet customer specification; 4. Debug product to fix incorrect operation and meet customer specification; 5. Works with a project leader to identify tasks and plans; Reports execution progress to support project management 6. Work with an architect to define block specification, simulation, verification and physical validation plan; 7. Work with other team members to build up design knowledge and improve way of working (Continuous improvement & Lessons Learnt) 8. Develop his/her leadership on his/her domain of skills and actions. -Innovations, technologies, methodologies,… 9. Coaches less experienced colleagues when needed or asked for.

职位要求：
) O" y: W0 g4 H& ~9 T6 nRequirements 1. BSEE with minimum of 6 years or MSEE with minimum of 2 years analog design experience; 2. Experience designing any or all of the following: DCDC, Charge pump, LDO, amplifier and comparator; 3. Familiar with CAD tools and environments, i.e., design workstations and UNIX; Familiar with Cadence Spectre, Virtuoso Layout XL; 4. Experience in analog layout design and physical validation; 5. Ready to travel (multi-sites R&D developments) 6. Open in communication 7. Good command of English (multicultural environment); 8. Good team-worker with a pro-active attitude; 9. Experience in AMS Top Level Verifications is a plus 10. Experience in CAD support (CAD methodologies and tools) is a plus 11. Experience in PCB design, instrument and measurement, lab skills, and lab evaluation is a plus.

能者與意者請 email resume 與chip123聯絡。

ranica

招聘公司：A famous IC company
工作地点：shanghai
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! [  n' V5 c0 U岗位描述：
2 A8 ?# m! V8 N8 CJob Description: In this role you will be responsible for chip/block level floorplanning, power planning, timing-driven place and route, congestion analysis and repair, clock tree synthesis, timing closure and physical verification (DRC/LVS). Perform circuit custom layout design and power planning.
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职位要求：
Job Requirement: 1. Experience in ASIC physical design (place and route, DRC/LVS, power distribution, etc.) 2. Be familiar with PR tools such as SOCE/Austra. 3. Be familiar with chip tape out flow. 4. Experienced in circuit custom layout design. 5. BS/MS degree in Electrical Engineering, or science related subject. 6. Good communication and teamwork skills.
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能者與意者請 email resume 與chip123聯絡。

ranica

招聘公司：A famous IC company
1 w4 \4 P: t  k8 ^$ Z2 z" t  V工作地点：Shanghai
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9 t$ @5 H% }: s+ X' r/ c岗位描述：
" V( v/ F1 w8 vJob Function This DV Manager will be part of a team working on the future integration of complex SOC and switching product. The successful candidate will play a key role in driving many of the key DV architectural and in depth technical aspects of various projects and perform the following duties: - A multidisciplinary function, working in close collaboration with the design engineering teams and managers and directors on the various efforts involved in the definition and implementation of various projects and scoping development efforts and project schedules. - Responsible for the overall chip verification, in addition to the possibility of direct responsibility for the architecture of specific IP blocks or functions, depending on any specific area of expertise the candidate might have. - Interacting with and guiding a wide variety of internal and external design verification development teams, DV methodology, silicon IP and tool vendors. - Work with senior management, architects, and the design and DV teams across sites to contribute in definition of ASIC products specifications, feature definition and architecture.

职位要求：
Skills/Experience - 10+ working experience in the field of design verification, experience in networking or switching design is a big plus. - 3+ years as DV technical lead/architect or manager position. - Proven experience of the latest design verification methodology such as OVM, assertion based coverage driven verification (code & functional coverage), constraint random test generation, formal checkings, power verification, modern design verification tools and languages (e.g. PSL/SVA, SystemC++, SystemVerilog, Vera, Specman, simulation systems) - In depth experience in use of SystemVerilog and OVM to drive testbench is highly desirable - In depth knowledge of ASIC design fundamentals from RTL to GDS including DFT verification. - Experience in power verification is a plus. - Proven debugging and problem analysis skills. - Strong documentation and communication skills. - Good people and project management skills including scheduling, resource allocation, risk assessment, matrix management, and process development and organized and methodical with proven ability to plan and execute project. - Ability to work well in a dynamic, fast-paced, pressure filled, across multiple sites North America and Asia - Flexible in terms of responsibilities and hours. Education Requirements MSEE or PHD in EE or CS

( G3 g7 q2 ^" W( D5 N7 y能者與意者請 email resume 與chip123聯絡。

ranica

招聘公司：A famous IC company
! l  T2 S: j- P& W8 d工作地点：Shanghai

$ D% s6 C3 m- D0 i' h' `岗位描述：
& y4 d2 n9 w" V% c+ P$ nJob Function
$ Z) s8 M3 u' Q-Develop reusable block-level and system-level ASIC testbenches using Systemverilog
, T0 c/ }2 u# g9 @4 T-Develop SOC verification environments to support ASIC development.
9 F$ m) r; |) D: T3 y-Maintain existing ASIC verification environments.
-Define and develop application tests required to verify ASICs meet functional and performance goals.
' I/ Q9 E% }9 M9 L-Define and implement functional/code coverage plans.
-Develop testing and regression methodologies for new verification flow.
6 z, h9 P) y; t" u- g% e- g4 O4 y-Develop/maintain/enhance environment tools/scripts/makefiles.
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! j0 G3 H- b6 d! e& h职位要求：
Skills/Experience
9 {6 ~  w2 B2 g5 e+ V0 W6 \( K3 p3 to 5 years of applicable work experience
-Minimum of 5 years ASIC Verification experience in a product development environment
-Proven ASIC Design Verification skills
-Rich experience with Vera/Specman E or SystemVerilog
-Digital verification experience on MIPS CPU/AXI/DDR Controller
1 A/ m- y5 W: }-Knowledge of data and telecommunication networking(IP/Ethernet)
-Experience with one or more scripting languages: TCL, Perl, python
-Superior debugging skills for large ASIC designs
-Strong written and verbal communication skills
' g0 t  o1 K' y4 ~% x( q' G; n-Adaptable to evolving customer requirement

! n; b! Z4 L) m3 v+ X" uEducation Requirements
) v$ k$ [; T; g- x. Q2 X# mBS/MS degree in Electrical Engineering, Computer Science, or related field
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能者與意者請 email resume 與chip123聯絡。

ranica

招聘公司：A famous IC company
地点：上海
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Job Description
Working closely with both RD and Application Engineering teams and responsible for defining and supporting IC-package-PCB power and signal integrity solutions including product specification, technical marketing and carrying out customer evaluation, benchmark and support

( n1 H: N2 g9 [* N2 R1 p7 lQualifications
Proficiency with high-speed I/O (DDR) signal integrity
! E+ v1 H4 u8 G% aFluent in HSPICE/Spectre/Eldo transistor level circuit simulation for IO noise and timing
Knowledge on die and IO ring physical design, LEF/DEF/GDS
, H% @3 C  T) h' Z, g5 W' wSelf motivation, teamwork and strong English communication skills (both written and oral)
9 z: o) t5 u" j6 KM.S. or Ph.D. in Electrical Engineering or other related areas

7 x: u" d& v" F  Y' ]# J# G- r能者與意者請 email resume 與chip123聯絡。

ranica

招聘公司：A famous IC company
工作地点：Shanghai
, a. S: u0 s' r
岗位描述：
3 j- T  m- S+ @" S* r% x. c+ EJob Description Develop and maintain the IC design database for IC-package-PCB power and signal integrity solution
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4 L5 f, V# a# i. X" D( HQualifications Strong C/C++ programming experience in Linux Experience with the algorithm and implementation of large data parsing, handling and processing Experience with IC placement and routing including LEF/DEF/GDS data is required Experience with SPICE simulation is a plus Excellent verbal and written communication skills M.S. or Ph.D. in Electrical Engineering, Computer Science or other related areas
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能者與意者請 email resume 與chip123聯絡。

ranica

招聘公司：A famous IC company
* \% g2 w' A/ M, y; h2 ?5 ?$ V工作地点：Shanghai

岗位描述：
( \8 u- {1 U: ~. Q: fPurpose: The primary objective of this role is to specify, document and work on the ARM eMPU (embedded MicroProcessor Unit) products and various offerings in Shanghai Design Center (SDC). This position is also required to support early customers on the new ARM eMPU products. The ARM eMPU Systems Team is part of the ARM Applications Group, with the role to specify and document the ARM-based embedded microprocessors and related offerings that are destined to the customers. The ARM eMPU products may embody crypto functions, secured boot loader and/or other secure features, or may specifically be designed for secured applications such as point of sales (POS) terminals or smart meters and secured data concentrators for Smart Grid applications. The roles of the team also include product datasheet/application note composition, product development follow-up, key customer support, reference design integration, and marketing support for product promotions and product introductions. Key responsibilities/duties: 1. Work with the marketing team and the design team in the eMPU product feasibility stage and convert the marketing requirement documents (MRD) into product functional specifications. 2. Define the eMPU product related offerings (in form of tooling plans), including but not limited to benchmarks, application notes, evaluation kits, development platforms, reference designs, software packages and frameworks/stacks, development tools and programming tools, (real time) operating systems porting, etc. 3. Document the eMPU products and deliver the advanced datasheets, preliminary datasheets, and final datasheets. Document system level application notes. Document the errata when necessary. 4. Coordinate the New Product Introduction (NPI) projects of the eMPU products within the Applications Groups. 5. Support the early customers on the new eMPU products. Train the Support Group on the new eMPU products. 6. Define and work on system level projects around the eMPU products, including development platforms and reference designs, especially for the applications in the strategic market segments. 7. Communicate with the eMPU Systems Team in France for solving issues. Position reports to: Directly reports to the ARM eMPU Systems Manager in SDC. Titles of position that report to this position: None. Key relationships / interfaces: Internal - Product Marketing Team, IP nd Design Integration Teams, Support Team, Product Engineering Team and other teams within the Applications Group. External - Key partner and early customers.

0 b( q5 |9 O9 K) ?职位要求：
Requirements (indicate must or preferr) Key skills & knowledge (technical): 1. Must have experience in developing the ARM-based embedded systems, including hardware and software. Related customer support experience is a plus. Experience in specifying the ARM-based eMPU SoC at system level is a big plus. 2. Must have experience in working with different functions at multi-levels. Experience in project management is a plus. 3. Must have the ability to communicate effectively with multi-levels of internal and external interfaces. 4. Preferred industry experience in semiconductors and/or embedded systems solution providers. Preferred multi-national company (MNC) working experience. 5. Knowledge and experience of cryptography (SHA, DES/AES, RSA/DSA, etc.) and secure products development is a plus. Language skills: o English, fluent conversation, reading and writing. o French, would be appreciated, but is not a must. Relevant experience: Minimum 5-year experience in embedded systems development. Qualifications: Bachelor above degree in Electronics Engineering or related; Master degree preferred. Natural talents (innate competencies/behaviors): High sense of accountability Sense of leadership Passion for people development Team and project management skills Ability to manage conflicts Detail-oriented and pursuit of excellence Reactivity, self initiative Customer-friendly

能者與意者請 email resume 與chip123聯絡。

ranica

招聘公司：A famous IC company
工作地点：Shanghai

7 a. G3 T# V* T岗位描述：
Purpose: The primary objective of this role is to specify, document and work on the ARM Flash MCU products and various offerings in Shanghai Design Center (SDC). This position is also required to support early customers on the new ARM Flash MCU products. The ARM Flash MCU Systems Team is part of the ARM Applications Group, with the role to specify and document the ARM-based flash microcontrollers and related offerings that are destined to the customers. The ARM Flash MCU products may embody crypto functions, secured boot loader and/or other secure features, or may specifically be designed for secured applications such as point of sales (POS) terminals or smart meters and secured data concentrators for Smart Grid applications. The roles of the team also include product datasheet/application note composition, product development follow-up, key customer support, reference design integration, and marketing support for product promotions and product introductions. Key responsibilities/duties: 1. Work with the marketing team and the design team in the Flash MCU product feasibility stage and convert the marketing requirement documents (MRD) into product functional specifications. 2. Define the Flash MCU product related offerings (in form of tooling plans), including but not limited to benchmarks, application notes, evaluation kits, development platforms, reference designs, software packages and frameworks/stacks, development tools and programming tools, (real time) operating systems porting, etc. 3. Document the Flash MCU products and deliver the advanced datasheets, preliminary datasheets, and final datasheets. Document system level application notes. Document the errata when necessary. 4. Coordinate the New Product Introduction (NPI) projects of the Flash MCU products within the Applications Groups. 5. Support the early customers on the new Flash MCU products. Train the Support Group on the new Flash MCU products. 6. Define and work on system level projects around the Flash MCU products, including development platforms and reference designs, especially for the applications in the strategic market segments. 7. Communicate with the Flash MCU Systems Team in France for solving issues. Position reports to: Directly reports to the ARM Flash MCU Systems Manager in SDC. Titles of position that report to this position: None. Key relationships / interfaces: Internal - Product Marketing Team, IP nd Design Integration Teams, Support Team, Product Engineering Team and other teams within the Applications Group. External - Key partner and early customers.
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职位要求：
Requirements (indicate must or preferr) Key skills & knowledge (technical): 1. Must have experience in developing the ARM-based embedded systems, including hardware and software. Related customer support experience is a plus. Experience in specifying the ARM-based Flash MCU SoC at system level is a big plus. 2. Must have experience in working with different functions at multi-levels. Experience in project management is a plus. 3. Must have the ability to communicate effectively with multi-levels of internal and external interfaces. 4. Preferred industry experience in semiconductors and/or embedded systems solution providers. Preferred multi-national company (MNC) working experience. 5. Knowledge and experience of cryptography (SHA, DES/AES, RSA/DSA, etc.) and secure products development is a plus. Language skills: o English, fluent conversation, reading and writing. o French, would be appreciated, but is not a must. Relevant experience: Minimum 5-year experience in embedded systems development. Qualifications: Bachelor above degree in Electronics Engineering or related; Master degree preferred. Natural talents (innate competencies/behaviors): High sense of accountability Sense of leadership Passion for people development Team and project management skills Ability to manage conflicts Detail-oriented and pursuit of excellence Reactivity, self initiative Customer-friendly
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# T2 v7 U. w- P, Q+ r2 T能者與意者請 email resume 與chip123聯絡。

ranica

招聘公司：A famous IC company
工作地点：Shanghai
4 l9 Y# g, u5 ?7 j/ Y4 ?
岗位描述：
, X2 i& \- T8 S2 ~Purpose: Working in ARM MCU design team under Shanghai Design Center (SDC), the primary objective of this role is to implement design integration for the 32-bit ARM-based MCU product line, as a senior team member. The role of ARM MCU design team is to perform the system-on-chip (SOC) design integration tasks for the 32-bit ARM-based MCU product line, collaborating with the main body of design teams in France. The role of the team may also include marketing feasibility study, application group support for design specification and datasheet, product engineering support for testing and characterization, IP design group coordination for customized cell development, and so on. Key responsibilities/duties: 1. Participate in the development of products. 2. Help the manager to manage the projects, follow up and report progresses, assist and coach others technically if necessary. 3. Participate in the communication with the IP and design teams in France for defining the tasks and objectives, reporting achievements and solving issues. 4. Participate in the collaboration with various internal teams for feasibility; product specification and datasheet; library development; product test, debug, and characterization, place & route. 5. Work with external licensers, IP providers and design service providers to efficiently complete the design projects, when necessary. Position reports to: Shanghai ARM MCU IC Design Manager Titles of position that report to this position: None Key relationships / interfaces: Internal - Design and Core/IP teams in Francemainly, but also other teams in France and Shanghai External - Core licenser (ARM), I providers, design service providers

职位要求：
Requirements (indicate must or preferr) Key skills & knowledge (technical): 1. Must have a strong experience in some phases (all phases preferred) of SOC development, including RTL coding, RTL simulation, synthesis, STA, formal proof, design for testability (DFT), design for manufacture (DFM), and post-layout simulation. 2. Must have a proven knowledge and experience in microcontroller architecture. Knowledge and experience in AHB/AXI, ARM microcontroller especially on Cortex cores is a plus. 3. Must be very familiar with Cadence and Synopsis design tools. 4. Must have a proven record in successful SOC design project as a key member. 5. Must have a strong passion and motivation to develop career in embedded SOC design track. 6. Must have the ability to communicate effectively with internal and external interfaces. 7. Must be self-starter with the ability to proactively propose technically competent solutions, shall like to be result-oriented and shall manage time efficiently. 8. Preferred multi-national company (MNC) working experience. Language skills: o English, fluent conversation, reading and writing o French, would be appreciated, but is not a must Relevant experience: Minimum 4-year experience in product (ASIC or Microcontroller) development. Qualifications: Bachelor degree in Microelectronics or related major; Master degree strongly preferred Natural talents (innate competencies/behaviors): High sense of accountability Rigor and method Reactivity, self initiative Detail-oriented and pursuit of excellence Work well in a team environment Good communication skills
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能者與意者請 email resume 與chip123聯絡。

ranica

招聘公司：A famous IC company
工作地点：Shanghai
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7 e1 {: l8 a& t+ T2 _+ z- Q岗位描述：
Job description The candidate will be responsible for CMOS analog circuit schematic design, layout design, IC test and debug for analog design such as CMOS ADC/DAC, LDO, DC-DC converter or charge pump etc. Responsibilities -Design analog block circuit meeting the system requirements -Analog block circuit layout and post-simulation -IC test and debug -Documentation and report about the designed circuit blocks

职位要求：
Qualifications -BS or above, Electrical Engineering -5 years or more industry experience is must -Tape-out experience is a must -Strong knowledge about CMOS analog circuit design -Knowledge about bulk CMOS process -Familiar with Cadence tools including Spectre, SpectreRF, Ultrasim, Virtuoso, and Calibre LVS/DRC/PEX, etc -Familiar with spectrum analyzer, oscilloscope etc -Familiar with Matlab, Simulink is preferred -Good English communication skills -Self-motivated emphasis on teamwork, schedule, plan and delivery
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; K4 R( p/ D# }9 B: @2 F) A$ {, T能者與意者請 email resume 與chip123聯絡。

ranica

招聘公司：A famous IC company
工作地点：Shanghai
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7 K3 h- \% f& t7 t+ B' j! b( P1 h1 h岗位描述：
' V% O1 K$ l& URole This person will be the lead “define market and/or application” system architect within xx and will drive our product definition and application platform strategy to ensure successful penetration of the market.  Specific Duties: – Support development of the strategic plan for the business: • Application platform strategy & roadmap • Ecosystem partner strategy & roadmap – Drive the creation and execution of high value products: • Create long-term architectural level relationships with the technical experts who design and influence the evolution of the target application at both customers and customer’s customer. • Drive product definition sessions with key architects at target customers. Ensure application/market requirements drive product technical specifications. • Drive feasibility assessments and recommend/review/approve product definitions with PM, TME, and other relevant groups, as applicable. • Technical lead w/ identified ecosystem partners for the business. – Drive unique and compelling value into the application roadmaps and product definitions for silicon and IP (both horizontal and market specific). – Support the execution of Business Development strategies for the target application/market: • Contribute to Sales account penetration plans. • Define prioritized Design Win targets. • Provide systems architecture and solutions support for sales efforts. • Lead technical response (architectural proposal) to RFQs and RFPs. • Support system-level design-in applications collateral - articles, demos, technical keynotes, panel presentations, and trade show support. – Deliver platform-driven design wins at target customers. – Demonstrated technical output: • Patents and trade secrets (as appropriate) • Participation in industry conferences, workshops, panels, standards committees, etc. • Journal articles (include Xcell Journal), applications notes, and white papers • Articles in industry publications • Mentoring of other employees • FPGA based Architecture White Papers

职位要求：
Requirements • BSEE or MSEE equivalent • >7 years experience in Systems Engineering or Hardware Architecture of Telecommunications or Data Communications Systems • Knowledge of OTN and PON standards, applications, and hardware architecture • Knowledge of Carrier Ethernet and Data Center standards, applications, and hardware architecture • Able to cover topics from network level architecture down to RTL level inside an FPGA • FPGA architecture and implementation experience • Excellent oral communication skills • Bi-lingual Mandarin/English Speaking • Self-starter, comfortable working and able to provide results in an unstructured environment and reporting in to a remote manager • Customer interface experience is a plus

: @4 B1 ]/ u1 k% e+ A( g7 U6 f* Z! L能者與意者請 email resume 與chip123聯絡。

ranica

招聘公司：A famous IC company
工作地点：Shanghai/Wuxi
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岗位描述：
In the position of DSP/System Engineer, the candidate will 1. Work on implementing new algorithms and techniques for wireless communication systems. 2. Work closely with the senior system engineers in implementation, optimization and design of complex algorithms and integration of the system. 3. Must be able to conduct C/Assembly coding of DSP functions, system design, performance optimization and architectural trade-off for hardware and software implementation.

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Ideal candidate for this position will have 1. In-depth knowledge of wireless communication systems with specific knowledge of DSP and C programming. 2. Must have strong competency in communication and signal processing algorithms and understand DSP architecture. Requires MSEE or PhD with 3+ years of experience.

能者與意者請 email resume 與chip123聯絡。

ranica

招聘公司：A famous IC company
6 }8 l  X( G1 v; u: \工作地点：Shanghai/Wuxi
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9 d4 \' {/ U  T) d岗位描述：
In the position of System Engineer will work on 1. Developing new algorithm and techniques for wireless communication systems. 2. Work closely with the senior system engineers in design and simulation of complex algorithms and integration of the system. 3. Specific tasks will include design of sphere decoder algorithm, its simulation and optimization and working closely with ASIC and FPGA team in hardware implementation and verification.
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' Z$ `' [  w& }职位要求：
Ideal candidate for this position will have: 1. Good knowledge of wireless communication systems with in-depth understanding and direct experience in MIMO signal detection and sphere decoding. 2. Experience in maximum likelihood decoding and detection and their efficient implementation. 3. Must have strong competency in simulating complex communication and signal processing algorithms in MATLAB and C. 4. Knowledge of ASIC/FPGA design, fixed point operation and lab equipment a plus. 5. MSEE with course work in communication and signal processing required with 2-3 years work and/or research experience.

能者與意者請 email resume 與chip123聯絡。

ranica

招聘公司：A famous IC company
' c/ i' j% B7 B3 ^招聘岗位：IC Architecture Design Engineer
/ a9 y% r2 P: I3 G6 H工作地点：shanghai
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岗位描述：JOB SUMMARY 工作概述
' V. u/ Q& i/ a' y; A' fResponsible for architecture defining and C-modeling on 3D graphics blocks for the next generation of STB/IPTV/HiDTV products;
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ESSENTIAL DUTIES & RESPONSIBILITIES 主要工作内容和职责
4 H+ }7 i) R" i8 [$ }  y, k5 ZDo 3D architecture design, C-modeling, test plan and hardware verification of the assigned graphics blocks;

9 l3 `6 g" G$ X5 ^* E! I职位要求：
0 ^. D  |# Z0 K) ]  S- ^6 |9 x; fJOB QUALIFICATIONS 岗位要求
1. Education / 教育背景：
Master degree or above. 硕士或以上学历
major in CS, EE, or related;
' O6 q! ]+ T6 l 2. Experience/工作经验：
/ }6 l- E* t$ h8 W) D# ]Have working experience on hardware c-modeling, 3D graphics driver, and/or 3D graphics application;
# q8 `8 N: u8 ~' I3. Knowledge of/Skills and Abilities / 知识掌握/技术及能力：
Be familiar with hardware c-modeling and have 2 years hands-on experience on c-modeling of the 3D graphics engine;
- `6 x. J* {" U6 n) ~) `Have good skill in C/C++ coding;
Have strong hardware knowledge of computer graphics, OpenGL, and/or other 3D standards;
Knowledge of computer architecture and logic design is required;
Know-how on Verilog or other HDL language is preferred.
$ ?- d7 W: I4 U2 K4. Others/其它：
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1 D; i3 D* e$ Y; ~. SEQUIPMENT USED 需要使用工具
) ], C/ C/ q# ?0 ^& c1. Be familiar with UNIX OS or Linux OS;
2. Good skill in script languages, such as perl, tcl, python etc