There's a career in Analog/Mixed-Signal? Where's A/MS Talent in Taiwan?

tk02376

GSA Furthers Its Commitment to Supporting Analog/Mixed-Signal Talent in Europe by Hosting Executive Panel
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4 F1 M: }! }* t! ~8 |7 I9 tSAN JOSE, Calif. (May 19, 2011) – The Global Semiconductor Alliance (GSA), the voice of the global semiconductor industry, held the exclusive panel session Supporting Analog/Mixed-Signal (A/MS) Talent in Europe & Its Impact on the Future in conjunction with the GSA & IET International Semiconductor Forum on May 12. The panel addressed challenges in attracting young talent to the A/MS field, best practices that could be used to peak students’ interest in A/MS, how to encourage universities to have stronger education in A/MS, how to keep A/MS talent within Europe, and new A/MS solutions being developed within universities and institutions that are tackling the most advanced design challenges.
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  N1 K1 g6 E* C4 `! k+ x/ cMore than 80 delegates attended to hear the perspectives of moderator Tim Hamer, director of knowledge management, The Institution of Engineering and Technology (IET),  and panelists Dr. Derek Boyd, chief executive officer, NMI; Gary Duncan, vice president of engineering, Dialog Semiconductor; Thomas Riener, senior vice president and general manager, Full Service Foundry Business Unit, austriamicrosystems; Dr. Willy Sansen, professor emeritus, K.U. Leuven; and Josef Sauerer, head of department - analog IC development, Fraunhofer Institute for Integrated Circuits IIS.

tk02376

Analog and mixed-signal content is increasing, with the wireless market, specifically smartphones, growing at an exponential rate. While this creates great opportunity for analog/mixed-signal IC suppliers, opportunity comes with challenge. IC design is becoming increasingly complex as we move to the leading edge. For Europe to remain a competitive player in analog/mixed-signal, its universities must produce students that can develop new solutions that tackle the most advanced design challenges.
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. q3 @' O: F( R( B" z5 J4 FThe findings of the panel discussion suggested the responsibility of cultivating an environment where Europe’s A/MS industry and its talent can flourish should be shared by many, including government, semiconductor companies, universities, industry associations and research institutions. The panelists stressed the importance of the European Commission voicing that semiconductors are indeed a key enabling technology; chip companies partnering with universities and employing graduates to validate there is a career in A/MS;  and educating students at a very young age what is possible with math, physics and engineering.

tk02376

“In June 2009, GSA’s Europe RF/Analog/Mixed-Signal Working Group recognized the importance of establishing Europe as a center of excellence for A/MS and fostering job creation and innovation,” stated Sandro Grigolli, GSA’s EMEA Executive Director. “It is events like the May 12 panel discussion that showcase Europe as an innovative hub which needs the support of its universities, government, industry organizations and semiconductor community to remain competitive. GSA will continue to be part of this support system.”
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$ \0 A9 {; t& Y1 ?* c3 F9 xAbout GSA:
- {" L9 p! I5 i9 I+ ]# G0 T+ qThe Global Semiconductor Alliance mission is to accelerate the growth and increase the return on invested capital of the global semiconductor industry by fostering a more effective ecosystem through collaboration, integration and innovation. It addresses the challenges within the supply chain including IP, EDA/design, wafer manufacturing, test and packaging to enable industry-wide solutions. Providing a platform for meaningful global collaboration, the Alliance identifies and articulates market opportunities, encourages and supports entrepreneurship, and provides members with comprehensive and unique market intelligence. Members include companies throughout the supply chain representing 25 countries across the globe. www.gsaglobal.org

ranica

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5 Z3 M7 U: i, ~2 }招聘公司：A famous IC company
: X. X* t3 _. V; I8 G. s招聘岗位：Analog Mixed Signal Design Engineer
7 B& R3 i0 f  L3 h工作地点：Shanghai

; H6 _" x; K% g3 z岗位描述：
Job Summary As an Analog Mixed Signal Design Engineer you are member of one or our PMU product development teams that are defining and finalizing design solutions, from feasibility study to complete qualification and production. As a Mixed Signal Analog Design Engineer, you will be developing analog IP and analog blocks for energy & power management IC. These IPs are then integrated within IC & you play an important role in the mixed signal integrated circuits design. The role will cover the full IC design cycle from specification through to testing of engineering samples.

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Key Areas of Responsibility 1. Carry out development activities from design, verification to physical validation for mixed signal integrated circuits (Analog, power and digital blocks) for power management IC; - Accountable for proper execution (schedule) & quality of own design - Ensures integrity & documentation of own design 2. Interface with layout team, performing or providing guidance for layout design and controlling layout design and work quality; 3. Evaluate the product with application team to meet customer specification; 4. Debug product to fix incorrect operation and meet customer specification; 5. Works with a project leader to identify tasks and plans; Reports execution progress to support project management 6. Work with an architect to define block specification, simulation, verification and physical validation plan; 7. Work with other team members to build up design knowledge and improve way of working (Continuous improvement & Lessons Learnt) 8. Develop his/her leadership on his/her domain of skills and actions. -Innovations, technologies, methodologies,… 9. Coaches less experienced colleagues when needed or asked for.
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职位要求：
Requirements 1. BSEE with minimum of 6 years or MSEE with minimum of 2 years analog design experience; 2. Experience designing any or all of the following: DCDC, Charge pump, LDO, amplifier and comparator; 3. Familiar with CAD tools and environments, i.e., design workstations and UNIX; Familiar with Cadence Spectre, Virtuoso Layout XL; 4. Experience in analog layout design and physical validation; 5. Ready to travel (multi-sites R&D developments) 6. Open in communication 7. Good command of English (multicultural environment); 8. Good team-worker with a pro-active attitude; 9. Experience in AMS Top Level Verifications is a plus 10. Experience in CAD support (CAD methodologies and tools) is a plus 11. Experience in PCB design, instrument and measurement, lab skills, and lab evaluation is a plus.
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; F: c: M. a/ s+ [7 S4 T; R能者與意者請email研發簡歷與chip123聯絡。

mister_liu

招聘公司：A famous IC company
) Y" k7 X( a  T7 D1 r0 q- n9 ~6 x; Z招聘岗位：Analog Design Engineers
7 q/ D4 M7 H& u% I工作地点：shanghai
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岗位描述：
$ C" ], X# q: e" X& R) AResearch, definition, design, simulation, layout supervision, characterization and release to production of high-performance state of the art BICMOS, video integrated circuits. The integrated circuits will typically include the following blocks:

Video Amplifiers
2 F5 K- s8 \. g1 sDC-to-DC converters, LDOs, PORs
+ ]$ z- e0 o! r9 RInterface Circuits –SPI, I2C, LVDS, …
Bandgaps and references
2 f0 ~+ u; q/ K2 GVoltage monitors
Analog-to-digital and digital-to-analog converters

9 G" M3 E! Q6 u0 T# f职位要求Job requirements -
  S: W) P& ~  v6 r: w" i; [MSEE degree, with at least 1+ years of design experience.
$ U4 v% G0 N- S# ?" `( OHands-on design experience with BiCMOS/CMOS mixed-voltage custom circuit designs
Must possess strong intuitive and analytical understanding of transistor-level design and simulation
Must understand placement and layout issues with respect to mixed-signal IC’s
1 ^$ ]+ `6 _7 |$ C5 V# J' X" hMust be familiar with Cadence mixed signal design flow.
# I8 b, }, Q4 A/ UGood English communication skill

jcase

專案詳細說明
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1.工作內容：我要發包測距儀放大電路設計
( p- f' z0 z! _) k2.配合時間：要為期3個月
3.配合地點：發包後可在家作業
4.專案預算：5千~10萬
& z$ I$ q" B, f& b& M! h5.注意事項：不限資格,只要有能力做的出來就給機會嘗試
  H/ |2 T7 o+ u
所需專長說明

5 R: K. J1 ~6 b0 m7 j) b. m+ g電子電路設計

jcase

專案詳細說明
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1.工作內容：我要發包有能力設計RF硬體的工作
2.配合時間：要面議
1 ~& \5 G- f# s- Y, i7 v3.配合地點：發包後作業地點均可
4.專案預算：面議
% r# w6 I0 a+ G  U* @6 [5.注意事項：需有實際外包經驗者並2年以上

ranica

招聘公司：A famous IC company
: A' [$ I9 d: u7 b4 M( ]# n9 a$ j* P4 q招聘岗位：RF FAE
工作地点：Xi'an
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岗位描述：
" m6 O. G, w% w" hJob Description Delivers technical expertise, application support and design services to customer based on XX RF products for mobile terminal and infrastructure area. Understands customer’s requirements & problems, recommends components solutions to meet their needs, and ensures customer satisfaction. Able to provide circuits debugging, simulation and EVAL boards modification for the customer Integrates XX products into customer’s environment. Ensures the product functions per specifications. Deliver training classes and consultant services to customers and channel partners. Work with division marketing team to implement market strategy in China, collect/analyze market info and involve in new product definition.

职位要求：
0 `+ f" _7 X0 w* Z, E3 a+ E0 ERequirement Bachelors or Master Degree or University Degree or equivalent, major in Electronics Engineering or relevant. A minimum of 5 years of experience in RF circuits design /debug or relevant experience. Expertise and experience for (EVDO/UMTS/TD handsets design) is the plus. Excellent interpersonal skills and teamwork. Excellent command of English. Available for both oversea and domestic travel.

ranica

招聘公司：A famous IC company
招聘岗位：Staff Engineer for International Standard
: ]( b/ M' S0 i" t2 p5 Q7 c工作地点：Shanghai

0 t# Q2 l6 O7 r8 k7 G6 ?- A. k岗位描述：
. c! ]0 j( P2 v4 r" c0 z, [$ s0 y1. Key responsibilities/duties: 1. Develop International standard for Wireless Power 2. Organize and participant monthly international meeting 3. Involve in prototype and reference design 4. Customize and design test manual, criteria and standard 5. Customer application support, development of and understanding of customer applications in embedded programming languages (C- and ASSEMBLY, primarily) 6. Understand customer applications and play a key role in feeding back market needs to the marketing organization. 7. Development of application notes and design notes for customer-specific or application-specific projects. 8. Provide the technical interface to customers and sales force during prospecting, evaluation, design-in and post-sales phases. 9. Assist Product Engineering in the analysis of field returns (FA and RMA).
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' a" F4 H& o7 T( z1 m职位要求：
Required skills 1. Overseas working experience or study 2. Vey fluent oral English and excellent written skill is mandatory 3. Good marketing sense and presentation skill 4. Project Management skills 5. Embedded C-programming for microcontrollers. Experience from AVR, MSP430, PIC, HCSxx, ARM or other architectures a benefit. 6. Preferred industry experience in semiconductors industry with embedded applications or microcontrollers. 7. Power design experience is highly expected 8. Project Management. skills 9Former international standard experience is a big plus 10. MBA is preferred

ranica

招聘公司：a top 15 semiconductor company
' \- H, Z% T; U招聘岗位：Application Engineer – Transceiver
9 U! Y* p( C& D# F" e工作地点：Shanghai
# i: _3 Y* H6 T. b: Y8 ]
6 o8 M' q2 V7 z. L. E, }; r% |$ \岗位描述：
Responsibility · Support transceiver key customers in device evaluation, system structure recommendation, schematics design and layout, problem diagnosis and trouble shooting, performance testing and benchmarking · Develop and customize reference/sub-system designs to demonstrate both component and signal chain level features, performance and advantages, including localized evaluation boards, sub-system boards and customer system boards · Facilitate new product definition and development by actively working with local and product line team members to gather requirements, generate technical spec and benchmark performance · Providing technical assistance and trainings to field application and sales teams · Setup and operate both internal and external labs in the region

  \9 T4 N. w5 \0 B1 X  @3 Y  ?$ p! B职位要求：
$ A! r' @& T& t& `: w/ e0 g+ ]Qualifications · MSEE/PHD, 5+ years of communication analog front-end design related experience o Signal chain level understanding to RF, ADC/DAC, Digital Filtering o Circuit simulation, test and performance measurement o Schematic design and layout experience o Skilled on lab equipments · Solid knowledge in wired/wireless communications systems is preferred · Good written and verbal communications skills in both English and Mandarin · Time management skills, multi-tasking ability and team player · Willing to travel frequently in China and aboard

ranica

招聘公司：A famous IC company
! `& l5 G. E# n$ \" `招聘岗位：Power system development director
工作地点：Shenzhen/Nanjing
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9 d$ h4 ^8 F1 V. @" B" N2 A岗位描述：
1) 领导10人左右的FAE/AE团队为客户开发电源系统模块，并为客户解决各种调试、生产中遇到的问题；
  }/ w3 ]( Q/ W) S7 I. x2）指导公司ic设计人员开发前的系统设计，把客户的最新希求提供给ic设计人员。
: F& }% O% k( z, k  X+ }3）大专以上学历，20年左右的小功率开关电源（LED驱动，手机充电器，适配器等）开发经验，具有丰富的生产调试经验。

ranica

招聘公司：A famous American IC company
招聘岗位：Product Applications Director
5 d( L& ]9 ~  `工作地点：Shanghai
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: A- ~# }# D2 }7 B0 I岗位描述：
Job Description Responsible for managing a fast growing system level development organization including:
# r' u; J& y1 L; y3 Q9 h- managing the software development team, the firmware team, the hardware team and the validation team.
6 P! C% x  l5 C" N- t6 t- hiring, coaching and training the expanding team members.
. O# l% n& h* n# J- developing and completing customer projects per schedule - transferring projects through NPI to production
. s4 g& c0 B) I- improving development processes and efficiency - developing and creating next generation platforms and technology.
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* l6 y1 L) N0 Z3 o4 I6 ]职位要求：
Specific Requirement Experienced manager with technical knowledge related to software, firmware, hardware and new product introduction.

ranica

招聘公司：A famous IC company
: a, ?  `0 [& r3 J' L0 P% ^招聘岗位：Principal RF/Mixed-Signal IC Design Engineer
工作地点：U.S.

, D5 B  J. Z3 Q6 a岗位描述：
Job Description
• Lead the architecture and IC implementation of high-performance RF, frequency synthesis, data conversion, and signal processing circuits for xx’s next-generation products.
• Lead the development of new circuit topologies and design techniques.
• Work with Communication Systems and RF Systems engineers to translate system level specifications to block level specifications, and use deep knowledge of state-of-the-art circuit techniques to optimize the system architecture.
, Q8 J! N8 y+ f$ C3 s  d# y• Work with ASIC and physical design engineers to integrate and verify the design at top level.
• Take designs from product definition through tapeout, characterization, and release to high-volume production with high yields and robust performance.

ranica

职位要求：
  x0 p$ O: A- N6 {' v4 _/ PRequired Skills Experience and Skills Needed:
• Must have a strong academic background with 7+ years industry experience in at least one of the following areas: o Analog/Mixed-Signal: data converters, filters, analog building blocks o PLLs and frequency synthesis: integer-N and fractional-N PLLs, DLLs, crystal oscillators o RF: LNAs, mixers, filters, PAs, and microwave circuits
3 w& D. F( F6 n4 e9 E2 X• Must have IC tapeout and productization experience, and should have hands-on experience leading the test and debug efforts for products.
, ]( G1 p( T. H# E( w• Should have familiarity with wireless or wire-line communication standards and how high-level requirements translate to block-level specifications.
• Must have experience with industry-standard simulation and design tools, such as Spectre, Spectre RF, Virtuoso, and Matlab. Education/Training Needed:
4 r% A+ E8 @" Z! D0 Z: K6 g• Master of Science (w/ research thesis) or Ph.D. in Electrical Engineering.
• 7+ years industry experience.

ranica

招聘公司：A famous IC company
招聘岗位：Sr Manufacturing Engineer
工作地点：Shanghai

# s* a$ a" ]  G; r4 g岗位描述：Purposes
8 D% k# U) I) O7 F# b1. Responsibility for performance of assigned supplier factory to meet the expectations of XX BU.
4 O: B8 i3 B7 t& g, Y2. Proactive monitor and anticipation of material flow constraints.
% o* n( X- U( `* T! Z3. Interface with Supplier resources and XX resources in reaching to constraints and solutions.
. ]; `6 d6 ?( x% g- `5 @4. Communicate with suppliers, Corporate planning team and BU planers as appropriate with the goal of achieving WW Corporate goals.
2 v2 t! I0 m1 }: |) N& ^5. Ensure tracking system supports the need for New Product introduction and Evaluation.
6. An understanding of all capacity requirements, availability and bubbles to support BU requirements.
3 w+ o: g+ r. {+ \9 ]7. An understanding of weak links of the assigned supplier in responsiveness.
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/ G0 k* M; K/ w0 QResponsibilities:
1. Establish both Leading and Lagging Indicators to track the performance of the assigned Supplier factories.
2. Establish measurement of performance indicators for XX consigned equipment.
$ q+ B8 r( _% b* w( r. q1 ]3. Review/establish proactive and reactive measures or warning systems in relations to performance tracking.
4. To drive the assigned suppliers on continuous improvement specified in cost elimination roadmap.
5. Ensure supplier processes are in compliance to XX requirement.
6. Establish reporting and visibility of performance on a preferred frequency to provide early warnings of performance issues.
7. Take complete ownership to interface with relevant supplier resources and XX Engineering, QA, Planning and Management to ensure resolute ions to any negative trends.
' ]1 C, d5 r8 b) S3 B8. Responsible to lead a business Process review of the assigned supplier sites for management.
9. Implement the processes standardization, good manufacturing practices, lean manufacturing among the suppliers to improve overall performance.
2 }+ d9 {. L# o2 e8 Q: K) j8 E10. First person of contact on all XX operational issues for the assigned supplier.
. w  N( I. k, \/ j, n8 R11. Establish relationship and network with direct and direct suppliers to obtain information on costing and any other relevant processes for use in the expectation of Continuous improvement.
8 N4 \2 l1 Z) |0 t% X' R, f8 Z5 p12. Provide leadership role on all Operational matters.

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Measurements:
- i  }  g9 _1 C1. Quantitative improvement of the selected Leading and Lagging indices.
2. Utilization of consigned equipment.
: Z2 ]. N3 S) J; p; u" p3. Cost improvement contribution from NVA elimination.
4. Identifying activities that will add up to the 80pet elimination visibility.
% M" T3 c1 n8 t5 X4 |9 j5. Joint ownership of performance measurements of Planning, Engineering, Test and QA.
Note: The above measurement will be quantified after analyzing the historical date.
Interact With All functions related Quality, Delivery, Cost and business process.
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职位要求：Requirements (Mandatory)
1. Minimum 7-10 years in Planning, experience in Project Management, product line transfers with minimum 2 years managerial role.
8 X7 T7 j$ u. Y; O: ^. K+ |% R2. Experience in managing project by interfacing/dependence with teams not directly reporting to the candidate.
5 G3 y$ R% J. H$ b* p( D9 k3. Minimum a tertiary educations in Industrial/Operations Management
4. Experience working in high volume IC manufacturing company for more than 5 years
5. Good communication and leadership skill
6. Able to travel
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6 x3 Y( P6 s) k- @5 Q/ ZOther Attributes
1. Communication skills, interactions skills
2. Working exposure in high volume IC subcontracting environment in managerial role is an added advantage
  T" X, d/ C# @, x. F; R( w3. Good knowledge of process mapping for problem solving
4. Good knowledge computer application

ranica

招聘公司：A famous IC company
招聘岗位：Sr. Foundry Yield Engineer
工作地点：Shanghai

; _3 S* U  r3 y( n# q0 c9 k岗位描述：
- i! k+ y1 S/ E$ Q1 I: GSUMMARY Primary responsibility is to manage the foundry die yield compensation program and process for all foundry sites. Additional responsibilities related to Foundry Product yields are also likely. ESSENTIAL DUTIES AND RESPONSIBILITIES include the following. Other duties may be assigned. Assist with the process transfer project Maintain the RMA/Scrap die yield limits for each product for each foundry Maintain the Target Yields & Yield Agreement Tables with each Foundry Calculate the quarterly die yields vs. plan for each foundry product Determine primary causes of gaps between planned and actual die yield Determine & consolidate the credit/debit for each foundry for each quarter Report the RMA and DYS results for each foundry each month SUPERVISORY RESPONSIBILITIES None QUALIFICATIONS To perform this job successfully, an individual must be able to perform each essential duty satisfactorily. The requirements listed below are representative of the knowledge, skill, and/or ability required. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions. Excellent statistical knowledge and skills. Proficient with Spotfire, Jump, Klarity Ace. Problem solving skills - analyzing data, understanding risk, making decisions. Good people skills - listening, communication, mentoring, and negotiation. Technical skills – Knowledge in all areas of wafer fab processing. Knowledge of device theory, WAT tests, Data correlation skills, FA methods, CMOS devices and NVM devices. Multitasking - ability to drive priorities across several fronts simultaneously. Presentation skills - ability to present and communicate information to senior management. Must hold an electrical engineering degree with at least 5 years experience. Demonstrated ability to work independently and follow through on long term projects

ranica

职位要求：
EDUCATION and/or EXPERIENCE Bachelors degree and 5+ years Fab process engineering/yield engineering experience. LANGUAGE SKILLS Ability to read, analyze, and interpret common scientific and technical journals, financial reports, and legal documents. Ability to respond to common inquiries or complaints from customers, regulatory agencies, or members of the business community. Ability to write speeches and articles for publication that conform to prescribed style and format. Ability to effectively present information to top management, public groups and employees. Fluent speaking, reading and writing in English. MATHEMATICAL SKILLS Ability to work with mathematical concepts such as probability and statistical inference, fundamentals of plane and solid geometry, trigonometry, calculus, matrix manipulation and device physics. Ability to apply concepts such as fractions, percentages, ratios, proportions and analysis to practical situations. Ability to apply advanced mathematical concepts such as exponents, logarithms, quadratic equations, and principles of algebra. Ability to apply mathematical operations to such tasks as frequency distribution, determination of test reliability and validity, analysis of variance, and correlation techniques. Ability to work with concepts such as limits, rings, quadratic and differential equations, and proofs of theorems. INTERPERSONAL SKILLS Ability to define problems/issues, collect data, establish facts, and draw valid conclusions. Ability to solve practical problems and deal with a variety of concrete variables in situations where only limited standardization exists. Ability to interpret and apply principles of logical and scientific thinking to a wide range of intellectual and practical problems. Ability to deal with several abstract and concrete variables. Ability to deal with nonverbal symbolism (formulas, scientific equations, graphs, etc.) in its most difficult phases. Ability to interpret/analyze a variety of problems, instructions and issues furnished in written, oral, diagram, or technical form. Ability to communicate internally and externally with all levels of an organization and to participate in problem solving/quality improvement activities. Ability to work independently. ESSENTIAL FUNCTIONS While performing the duties of this job, the employee is regularly required to sit and talk or hear. The employee is occasionally required to stand; walk; operate keyboard; operate controls; simple grasping; firm grasping; fine pinching; reach with hands and arms . The employee must occasionally lift and/or move up to 10 pounds. Specific vision abilities required by this job include close vision, distance vision, color vision, peripheral vision, depth perception, and ability to adjust focus. WORK ENVIRONMENT The work environment characteristics described here are representative of those an employee encounters while performing the essential functions of this job. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions. The noise level in the work environment is usually quiet.

ranica

招聘公司：A famous IC company
招聘岗位：Product Engineer
. ^; @' ?/ D7 ?/ i3 k& e5 Z工作地点：shanghai

8 ?# |9 U! i. F! L0 P% F' a- E职位要求：
, y+ y$ U& A$ S6 Q: VHands-on experience with analog IC lab verification and be familiar with lab equipments
9 C) o% x9 R  _' _& mBoard-level op amp design experience – 2yrs+
Pspice simulation of analog circuits – 2yrs+
Should have ability to write Pspice models.
, @( s- w; A- G/ HEducation >= Bachelors in EE
Good English communication skill