A Layered Verification Approach Applied to an AMBA-Based System

phoenixfeng

It’s common knowledge that the verification
stage for a given system is
5 ~# M1 i! O+ b3 J  X3 g/ A# Qaround 70% of the overall design
effort and schedule time. Reducing
overall time spent in test creation and
design verification is a high priority.
Success in these two areas increases
; I8 U) c/ ?9 _1 g, p5 Gproductivity and helps deliver products
# u4 ~5 G3 {" Pto market faster. To achieve these verification
/ N. n- B) Y9 V+ p5 w3 ^: {goals, engineers are constantly
' X( p$ T7 b- W: Plooking for new and innovative ways to
conquer the verification challenges that
/ B" O5 i; R% e4 ?' [- Xface them.
  Y( e$ U6 [0 H. Z2 v! E* [: cThis article discusses a layered verification
approach as applied to an AMBAbased
8 n) {4 ^/ \2 s  esystem component. The layered
( U: b* E2 w# W' d6 p  @approach is used to create a standardized
% r; J0 _! k9 w8 E9 z$ D3 ?verification environment that can
2 Z5 l8 H2 M$ Z1 \4 ladapt as the design challenges
) N; x1 I+ r1 Oincrease. Typically, reuse is very high
within an AMBA-based system because
) |6 U# E1 j& i# ?many new designs are based on earlier
5 W  q- u2 i8 Xversions of the standard system. The
. a* F) S% N# wexample shows the layered approach
being applied to verify an individual
+ S& X) s! y$ p, r9 Jblock as well as its integration into the
subsystem and final system representation.

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