The wholechip floorplan is very important before you start the layout.5 {; r) ]5 |0 G+ f A# B( X6 U
Then the position of output pin are fixed for each sub block,and the line drawing will be smooth.2 }* f8 G; @ c! Q& L2 f
Finally,the drc & lvs could be so easy to do . 9 L0 v/ s, O5 a/ d: o0 Q9 V! {0 I. FBut the floorplan must be verified by designer.The thing of re-layout almost have not be happened.