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積體電路佈局工程師核心課程養成班的必要核心課程?

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發表於 2012-2-16 17:34:59 | 顯示全部樓層
招聘公司:one famous IC company
: D. }, r9 u2 U/ B9 G招聘岗位:Sr. Layout Engineer
9 [6 G/ D+ K; Y# H: P% H/ \5 U( o工作地点:Shanghai+ c6 n4 B% e* ]1 I
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岗位描述:
* O7 x# ?2 Q9 X1 I( ]1 LJob Requirements: -Work with circuit designers to build physical design floor-plan; -Complete the physical layout design with the constraints of circuit design requirements; -Verify the physical layout design to meet both circuit design requirements and process requirements; -Use the advanced technologies to improve layout design quality and efficiency. ! I" y3 W8 f; `5 `' ]' Y  E+ N
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职位要求:% A7 ~9 X* P/ g7 M  C: e
Qualifications: -College degree (or above) in Electrical Engineering or other related engineering field; -At least 6 years experience in layout design field with rich tapeout experience; -Good understanding of basic electronic principles dealing with circuit and layout design; -Familiar with IC layout methodologies, flows and CAD tools such as Cadence virtuoso layout, Caliber physical verification; -Prefer experienced in PLL and IO design -Patient, A good team player, Good communication skills; -Can communicate with both written and spoken English.
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