* `/ l" E( @9 w) bPosition Description: 6 ~) u. j; m- I- N: D6 w
1. Lead high performance SSD controller SoC architecture design ; U; ]& `: r7 ]: e8 l: V
高性能SSD 控制器芯片架构设计 . B0 t$ q9 q$ G
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2. design emulation platform for complex SSD controller + ?$ E6 D" v. ^3 ?$ ?) j/ w9 A) e
开发复杂SSD控制器原型平台。 & H1 ?+ v! G# d J: ]6 {5 t1 L W( p: t
3. Work closely with cross-functional teams to enable pre-silicon RTL development ' }( N7 l, e& g" b! z
与架构、软件团队成员通力合作，完成流片前的RTL开发。 * \% j; x* s& j! e2 N" _7 I
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4. Validation of SoC design and system level use case and performance scenarios on emulation platform 0 s' V, v' t) S* k1 X6 n) R
在原型开发平台上验证SoC设计，建立和维护系统级用例和性能测试。 5 K7 e- e# l M& L+ l2 D # l- S9 O/ m2 R. r+ `' F0 d1 L5. Lead system level verification of enterprise/consumer SSD controller using latest verification methodologies : N* V2 J1 W; H$ t* I& s 采用最新的验证方法学进行SSD控制器的系统级验证。 1 j0 C! g& _, W! d% y# t 8 N! z8 U5 ?/ ~" z% V% x; s6. Post Silicon bring up, functional/performance validation and debug 5 _4 y8 c# _+ J0 \ 流片后的系统功能和性能的验证和调试。作者: ranica 時間: 2014-12-11 11:31 AM
Requirements: $ z9 T8 @5 C. o7 _" `# Z1. At least 5 years direct work experience on FPGA based product development or IC front-end design, in storage/server/telecom industry. Experience in SSD/HDD product design is preferred. , E( ?' V5 z& A
5年以上存储/服务器/电信领域FPGA产品开发或IC前端设计经验。有成功开发过SSD/HDD产品经验的优先。 ! L- h0 X+ O2 r8 b! @" m/ c 2 n# b: y x3 x4 L6 S( w: q, C: }2. Familiar with PCIe interfaces. Experience in SATA/SCSI/FC is preferred. 0 k/ n7 B: r, x1 I5 W+ j7 H2 A1 L 熟悉PCIe接口。有SATA/SCSI/FC接口协议开发经验的优先。 ; v, i$ e0 x7 h* N5 r
) f, a5 R2 ^. B! A7 U: t* y: A: l3. Familiar with DDR3/4 interfaces, ECC (LDPC/BCH). 0 @3 @: ~( p/ _. O" d
熟悉DDR SDRAM接口, ECC (LDPPC/BCH)等纠错码开发。 + P2 m s! k" C1 y& I/ u7 I A4 R- i" X; k- u
4. Familiar with eMMC/NOR/ONFI/Toggle interfaces is preferred. Deep knowledge of NAND Flash architecture is preferred. # r5 C! l X- r) ~" ? 熟悉eMMC/NOR/ONFI/Toggle接口协议的优先。熟悉NAND Flash底层结构的优先 . r s: |/ t+ U. n5 ~+ L & l. A6 B8 {1 f5. Good understanding of STA and SDC. 5 u6 t& p9 {& c# s 熟练掌握FPGA开流程和静态时序分析和约束。 6 H. ~7 I9 q& @7 ~
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6. Good understanding of SoC and on-chip bus. Experience in AMBA AXI3/4 is preferred. 0 K1 J2 m" |$ T, }* n7 `! X2 B% h
熟练掌握SoC和片上总线概念。有使用AMBA AXI3/4经验的优先。 5 Z% [8 `: T l( O d; _ ) f1 S; C) L/ T7 E6 m6 v2 u9 @
Common skills 5 a! I- ^7 t, N0 R8 ~, P1. Ability to ramp up quickly in new technical areas. # {/ N u( V1 B$ B具备快速进入新技术领域的能力。 8 S) X& }5 }& v/ G5 K& l! Q; l5 o# K A& W3 j& T$ K) s: e2 t
2. Creative thinker. * a* ^* O M7 P4 L: J1 c
具备创新思维。 $ q7 R2 A1 K9 U, |: g g" g f! L3 }, O6 a
3. Good communication skill in both English and Chinese. 5 _0 c! w" N4 l8 S' G( S$ l
良好的英语和汉语沟通能力。 3 _, g9 F. R9 s+ k, G; |$ c" \6 B9 K4 g# E) c9 U0 ~
4. Team-working, good communication and committed to delivery 0 @& @; }! X6 K- q' A+ @" n具有团队合作精神和良好的沟通技能
