; O, c7 t: M- E1 D----------以下是DATASHEET針對VCCIO & VCCINT所做的說明------------% F. s$ s5 k# N( F" Y3 o
! j3 ]% V/ @7 d3 ~ MultiVolt I/O Interface s) I; E. L% n+ A7 r
w N) V$ t' Z+ |MAX 7000 devices—except 44-pin devices—support the MultiVolt I/O* w/ ?2 o8 y4 Q
interface feature, which allows MAX 7000 devices to interface with A: L( B) X0 `systems that have differing supply voltages. The 5.0-V devices in all3 h' o+ a5 Y( a- D6 U# ~
packages can be set for 3.3-V or 5.0-V I/O pin operation. These devices( z! X) T4 [2 m4 e Y# \3 z
have one set of VCC pins for internal operation and input buffers$ a' s8 q" N, f
(VCCINT), and another set for I/O output drivers (VCCIO). 5 N* A- A. K9 UThe VCCINT pins must always be connected to a 5.0-V power supply.# L0 l( `+ u8 v; |! f0 x
With a 5.0-V VCCINT level, input voltage thresholds are at TTL levels, and ; C8 `0 T8 J% D9 X! ~, R8 F2 qare therefore compatible with both 3.3-V and 5.0-V inputs. + R$ c9 O6 Q9 g9 q9 wThe VCCIO pins can be connected to either a 3.3-V or a 5.0-V power 0 L% F0 W% N8 N: R% H8 Y9 fsupply, depending on the output requirements. When the VCCIO pins are1 ?, I4 {' O x( Z- G
connected to a 5.0-V supply, the output levels are compatible with 5.0-V! W+ j& e, f( [4 F n1 l/ t
systems. When VCCIO is connected to a 3.3-V supply, the output high is 8 ^5 w n! m5 W' D- S3.3 V and is therefore compatible with 3.3-V or 5.0-V systems. Devices / [& w3 M& H+ koperating with VCCIO levels lower than 4.75 V incur a nominally greater - t! k2 p! `) i, _" Ttiming delay of tOD2 instead of tOD1. 4 s: z3 N) ]+ k) C& w1 _( Y( O+ h6 t i- d4 b# v7 e; d% X
[ 本帖最後由 jimcooper 於 2008-11-9 04:21 PM 編輯 ]作者: sieg70 時間: 2008-11-10 07:54 AM
Vccint跟Vccio, 以及Ground"每根"都要接作者: addn 時間: 2008-11-10 10:04 AM
您好7 o; B+ |0 h* a
VCCINT接5v,則當io pin為輸入時,可接受3.3v,5v的輸入準位# C$ {5 f+ C8 j5 D1 G' }: C& i
VCCIO接5v/3.3v,則當io pin為輸出時,輸出準位就為5v/3.3v準為位7 S; a/ I% N& c/ n% W9 y- ?
) q; W& O# I2 ?; Z
[ 本帖最後由 addn 於 2008-11-10 10:16 AM 編輯 ]作者: ssejack1 時間: 2008-12-27 01:47 PM
VCCIO 在有些產品有分 block, 當不同 IO 電壓要使用在同一顆 IC 時可以劃分在不同的 block 就可同時使用不同之IO 準位; VCCINT 為 IC core 電壓,與 user 較沒直接關係,只要依 spec. 供給就沒有問題!, l3 S+ ~8 k# g8 ?8 f, p
須注意的是 VCCINT 與 VCCIO 有點影響,越低的 VCCINT 製程越新, delay / speed 多比較快,壞處是 VCCIO 會較低; ! ]# ` u( \' Y. `0 ?2 w比如 VCCINT = 3.3V者, VCCIO 一般 3.3/5.0 均可,但 VCCINT = 2.5者 VCCIO 或許無法始用 5.0 v 了! $ n$ V/ c: X* o' k- f+ W參考參考!