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標題: 论文翻译 [打印本頁]

作者: happinessyl    時間: 2008-4-21 01:36 PM
標題: 论文翻译
soc的博士论文翻译,很多专业词汇偶没有头绪,求帮助:
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7 e0 Z2 k6 x4 \; F9 b) v( [Multi-Layer Interconnect Performance Corners for Variation-Aware Timing Analysis
作者: masonchung    時間: 2008-4-21 04:25 PM
Can it find in IEEE ?
+ t/ F. y* t7 @1 }7 _" u/ tPlease give me the full name of  博士论文 , let's try to solve it; S* w+ l& W+ `& u

, |  k+ f; s' l! ^[ 本帖最後由 masonchung 於 2008-4-21 04:29 PM 編輯 ]
作者: masonchung    時間: 2008-4-21 11:56 PM
這應該是APR的論文/ _& [  q5 t3 G1 N5 R3 z4 f2 V! u
[attach]3659[/attach]+ K2 `8 f9 f+ f: _# Y# U

# [4 c4 J$ X+ G" T" t* SAbstract:3 R! |3 s7 |7 u& }9 J9 o0 h
Parasitic interconnect corner methods are known to                    5 s; T: D' K1 t/ M' d, e, N' P6 Q
be inaccurate. This paper explains the sources of their errors and6 g+ Z3 x8 c7 @% X" B
shows that errors in excess of 22% can occur in the predicted
( ?) v) i! Z2 O, o+ l, F2 Vcorner delays of a multi-layer stage in the presence of process: m8 [5 V) @" ?* C  L
variations. It is shown that exhaustive corner search methods are+ d0 T/ g+ S* {. w( d; S
infeasible in practice as they have an exponential complexity in
0 _9 H& _% ~. [+ fterms of required SPICE simulations with respect to the number; Z9 N9 k; |& ]1 X: |
of layers a stage is routed through. This exponential complexity& a1 v" o+ }+ p+ r
is reduced to a linear one with a new simulation-based search# Z/ c6 q0 n. A  ^, W
method with the aid of stage delay properties. The ideas behind4 ]& L9 d4 |; g1 H5 A
the simulation-based methodology are shown to be expandable
1 [% K/ b1 s3 }0 r! Ato an analytical-based multi-layer performance corner location
( S; ]7 B1 u( n; Omethodology. The simulated best/worst case delays based on these3 i) q* A& `- n# @- X" ~% e
analytical corners produce errors below 4% as compared to the. X- s1 I6 z4 |) m; E9 W: H
exhaustive search simulation based method.
6 Z  b  f: Z# |5 i2 h; e
" x, d  D8 t2 o  `[ 本帖最後由 masonchung 於 2008-4-22 12:01 AM 編輯 ]
作者: happinessyl    時間: 2008-4-22 12:28 PM
標題: 偶是门外汉
对的哦,就是这篇( G9 v/ ]' B4 b: T
很多专业词汇我不懂怎么翻啊6 ?  H0 n+ O6 j4 X! a

: X) e3 q: B* B- h1 G+ e& c5 @! Jthe name of this paper:    Multi-Layer Interconnect Performance Corners for Variation-Aware Timing Analysis3 B! I6 a$ ^7 h- v! G( @+ K5 M1 q

) a! H  b" ~3 I0 Y; T+ H比如说:& Q' A/ f# m% y. D0 V1 G
Performance Corners, l3 i. }2 W0 q" m: g7 d
Variation-Aware3 |0 h0 j# b% n7 S$ k+ b
stage6 d% c" C+ \; K/ G  ?
corner
" }7 f, x% C) m* y2 t之类的( y) Q2 F3 V; c0 [8 p( X) H) i
4 v: e8 K% O, C9 L" i7 `" y" r9 E
tx们帮帮忙啊
作者: Luby    時間: 2008-4-25 09:20 PM
建議你可以到EDA設計或RD討論區發問 9 @# k' s: o- L2 W9 h! M
或許可以得到較多回應哦  ^^




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