標題: 靜電放電測試 [打印本頁] 作者: ritafung 時間: 2008-4-12 12:55 AM 標題: 靜電放電測試 剛剛研究了靜電放電（ HBM ＆ MM） JEDEC標準，實在需要很長的時間去進行測試。假設該IC具有數以百計的pin，很可能將需要超過1個月完成整個測試。這裡是否有任何人負責做ESD測試？作者: m851055 時間: 2008-4-12 08:07 AM
竹科閎康科技有此業務2 v9 e& h1 h5 x5 h8 s6 s
電話在網頁就查的到了.......................作者: cuban487 時間: 2008-4-12 11:12 AM
很多實驗室好像都有,但都在台北.6 H+ b" a* w0 J( b$ \
儀特好像就有可以去查ㄧ下作者: kyyyyyykimo 時間: 2008-4-16 01:02 PM 標題: 很多家實驗室都有啊 目前新竹地區有"宜特"與"閎康"兩家比較大3 ?4 i# n& E4 [+ N
我的建議是去閎康，會比較適合。4 {/ B, @# b1 K- e" D! `
因為我本身工作性質也是有接觸到ESD測試5 i6 S# B$ d" S, f
測試多Pin需要花費時間比較長久，可是你們HBM是使用JECDE( m0 j5 |, o- B/ t5 X3 x4 P
在Zap的次數明顯比軍歸來的少了。 " @) i H# A5 D% Q; L& G+ r; r9 f作者: ritafung 時間: 2008-4-22 12:07 AM
my company is pursuading to MIL-Std ... . t; W# g$ M jactually any company need MIL-Std? Our application is not for military purpose....作者: wesleysungisme 時間: 2008-5-21 12:14 PM
For ESD test (HBM) / z w: e% I7 H. {# R5 S% lThe following are the test combination: # N2 g8 q- V+ j `* \1. Power to Power + o! }4 {1 N6 V! z; l2. Power to Ground 4 u' I! t7 J1 ^4 k3. IO to Power ; u7 F# ~( l& U7 O; [2 F, ?3 t9 h4. Io to Ground ) U' s+ {7 y8 o; I5. IO to IO9 S! m' M# Q; Z$ G! A
(different power domain need to be treated as different power. For ground usually you can treat as one group_silicon use substrate as common ground. But if you measure two different ground pin/ball > 2ohms. It should be seperated as 2 grond.)7 P' \9 d* H! U$ n- Y! H
, `: l' I& f% f: g1 ^the total zap time fomula will be~ 2(+/- polarity) X (IO#X(P#+G#)+IO#+P#X(P#-1)X(P#-2)X...X1+P#XG)5 G$ b( F: p ?5 i, [( _, Y
For example: You have IO1/IO2/IO3/P1/P2/G1 $ s4 V+ k8 y( ]- D! s8 T# T2x((3X(2+1)+3+2X1+2X1)=25(multiple the zap interval)( K$ J% D4 E0 k, @. `
So for high pin count it will take a lot of time. But it won't take more than a week(for one chip). / R9 X. M: ^: a0 R% [) H! ^- Z* `( d/ Q( A! [* \& Q
For your reference.作者: f5882077 時間: 2008-5-23 03:02 PM
樓上的Jason...據我所知大部分的IC設計都會跑去宜特做ESD...為什麼你要特別建議去閎康做呢?? & r. V3 i8 O) ^0 [4 ?5 x有什特殊原因嗎??會比較適合的邏輯是什麼??是否可分享一下心得??感恩~作者: ritafung 時間: 2008-5-26 09:15 PM
thanks wesleysungisme for your answer. m5 L9 F, P0 C5 y/ c9 @ s0 ?as our pin count is over 1000 and no. of power is ~ 20, so it's quite time-consuming. {$ V; I: w; Land there is technical issue about bonding all the dies into COB for ESD zapping, i wonder if anyone could share their practise? we feel difficult to strictly follow JEDEC standard.
