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標題:
有關hspice inverter chain design
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作者:
ShengKuanLa@FB
時間:
2016-10-4 10:51 PM
標題:
有關hspice inverter chain design
不好意思,大學修積體電路導論,目前的作業出到inverter chain 但卡在這好久,麻煩前輩們解惑了!問題是4階inverter chain,條件給了minimum size還有基本的cl 1pf等等,我用了網路建議的f=3.8試看看,第一關跑圖就失敗了。。。tr0跑出來的圖形歪七扭八整片顏色。。。下面是我的gedit inv.sp
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*****circuit****
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.subckt sub1 in out vdd vss
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Mp1 out in vdd vdd P_18 w=3u l=0.18u m=1
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Mn1 out in vss vss N_18 w=1u l=0.18u m=1
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.ends sub1
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.subckt sub2 in out vdd vss
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Mp2 out in vdd vdd P_18 w=11.4u l=0.18 m=2
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Mn2 out in vss vss N_18 w=3.8u l=0.18u m=2
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.ends sub2
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.subckt sub3 in out vdd vss
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Mp3 out in vdd vdd P_18 w=43.32u l=0.18u m=3
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Mn3 out in vss vss N_18 w=14.44u l=0.18u m=3
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.ends sub3
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.subckt sub4 in out vdd vss
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Mp4 out in vdd vdd P_18 w=164.6u l=0.18u m=4
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Mn4 out in vss vss N_18 w=54.87u l=0.18u m=4
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.ends sub4
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xsub1 a b c 0 sub1
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xsub2 b d e 0 sub2
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xsub3 d f g 0 sub3
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xsub4 f h i 0 sub4
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cl h 0 1pf
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*****source******
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vdd c 0 1.8
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vdd e 0 1.8
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vdd g 0 1.8
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vdd i 0 1.8
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vgnd vss 0 0
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vin a 0 pulse(0 1.8 1n 0.5n 0.5n 4.5n 10n)
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*vin a 0 0.9
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