標題: Configuration Management Engineer （Digital IC Design）請進來交流！ [打印本頁] 作者: tk02561 時間: 2011-7-20 12:12 PM 標題: Configuration Management Engineer （Digital IC Design）請進來交流！ 招聘公司：A famous IC company1 C9 X2 g! M ^" u) A+ H& P" C5 O
招聘岗位：(Senior) Configuration Management Engineer （Digital IC Design） 0 \! d g/ M) b v工作地点：Shanghai 5 G5 S/ x# A3 D6 \# B, b: H! \8 \, j" F( l& T) J
岗位描述：3 R/ w& m1 S a+ q) ~
Duties · Do database management/configuration management to support Digital SOC product development for mobile phones · Administrate Clearcase /DesignSync · Administrate change control and bug tracking tools · Do linux/LSF compute farm/ CAD tool first-level support to Digital SOC design team and interface to company IT/CAD organization · Take charge of CAD investment request consolidation + ~& l3 u1 r) X3 p0 J9 L
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职位要求：4 ]3 r# }8 y. s5 B6 ], n6 j
Requirements · B.Sc. degree or above in Semiconductor, Electronics Engineering areas · 2 years or above experience in Clearcase/DesignSync administration and configuration management in Digital IC Design domain · Good knowledge of digital SOC design is a big plus · Good knowledge of linux, LSF compute farm and script writing (e.g. C shell, Perl) · Good communication skill, will have frequent communication with foreign teams. · Good written and spoken English is mandatory. $ D3 }- x: s% \7 U1 O
$ U2 \2 \4 \5 H能者與意者請email研發簡歷與chip123聯絡。作者: tk02561 時間: 2011-7-20 12:15 PM
招聘公司：A famous IC company5 a0 H. ^0 r! L! h
招聘岗位：(Senior) Digital IC Design Engineer （FE Design） 0 s4 c7 A7 e: [; H1 U9 @) \工作地点：Shanghai % D/ p4 ~3 N& S2 B' j( v , x5 h: v4 A" P! m岗位描述： 6 g: |! z9 l J$ I; `: y, r$ d8 pDuties • IP design and support for digital baseband of cellular phones • Digital SOC design and integration for chips: ^& _+ w3 {1 E" P5 v/ H+ C
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职位要求：; x+ W7 l c1 M- A! ^! E3 Z
Requirements • B.Sc. degree or above in Semiconductor, Electronics Engineering areas • 2 years or above design experience in industry • Good knowledge of design flow including documentation, VHDL/verilog coding, code check, equivalence check, synthesis, timing analysis and RTL simulation. • Good knowledge of AMBA AHB/AXI protocol is preferred. • Good knowledge in UPF/IP-XACT based design flow is a big plus. • Hands on experience in digital IC design EDA tools, such as NCSim/Questasim, Design Compiler, Formality, Primetime etc. • Good communication skill, will have frequent communication with foreign teams. • Good written and spoken English is mandatory.作者: ranica 時間: 2012-4-16 11:36 AM 標題: Staff Engineer for Digital MAC Design 客户 A famous IC company& I k4 j8 u& k: O3 ?% T
地点 Shangha ; P7 |/ @( t z" g# {% \4 | $ R! Y8 n# f8 t9 x9 E# E5 f: q k( g7 @职位描述 ( Z) T5 O) d1 e' U$ LWe are looking for a person to join a design team to execute a state-of-the-art IC design project in the wireless communication field. Candidate must be familiar with digital IC design flow with a proven record of design and verification of a complex design project that led to successful silicon. Proficiency in Verilog is required. 7 a& Y% @7 M* }& s2 V5 W4 o& h& R. o9 q9 d- R' Q+ N$ Y% q
职位要求 2 L8 [1 i+ {) n7 H, ~2 zRequirements:7 t& l* R: ^! c4 o/ m
Experience in the following areas of expertise is desired:" @4 e% w9 G7 ~5 y% m% B. R) G
Wireless media access control (MAC) design experience would be highly desirable* o- l/ q ]9 |: y+ V1 C- _8 l" O
Knowledge of TCP/IP and DMA Offload Engine design experience will be a plus ! K4 s& Q# @5 Y6 o E3 LRTL design, verification, and chip integration , U1 x5 |2 |' J/ l# kExperience in the following is beneficial but not necessary requirement: $ \ J3 X* ?& e5 _' f* u1 O5 m# cCommunication systems and RF systems 9 l# p; }" x* G+ b1 I. R/ TFamiliarity with wireless communication systems and standards (802.11b/g/n and WiGig) , I4 P3 A5 C) F! SKnowledge of interface protocols such as PCI/PCIe would be a plus 5 H/ Q* B& R& D% l2 G! X+ gFPGA design flow, testing, and emulation bringup 2 e9 ]" Q- V3 z/ ?4 F) b1 K# V& u - H1 L0 j* Y+ \7 y$ a7 _4 D
Other requirements: % J- T+ E8 y" ]; ~( `" HFamiliar with design and verification languages, EDA tools and ASIC/SOC design methodology 4 X' Z6 V/ W& RGood script language skill, such as Perl, Tcl and Shell; 5 |! G3 X1 g, D% j0 P' M- `8 }
Good written and oral communication skills in English; , P$ [6 ?8 {! p8 H0 h# G( K
Good Team player3 u8 z @" K1 f3 L
Candidates must have MSEE degree with at least 5 years of experience