標題: There's a career in Analog/Mixed-Signal? Where's A/MS Talent in Taiwan? [打印本頁] 作者: tk02376 時間: 2011-5-20 09:23 AM 標題: There's a career in Analog/Mixed-Signal? Where's A/MS Talent in Taiwan? GSA Furthers Its Commitment to Supporting Analog/Mixed-Signal Talent in Europe by Hosting Executive Panel . S& x( y% Y# w3 M. h( Z % X& W y2 `7 [SAN JOSE, Calif. (May 19, 2011) – The Global Semiconductor Alliance (GSA), the voice of the global semiconductor industry, held the exclusive panel session Supporting Analog/Mixed-Signal (A/MS) Talent in Europe & Its Impact on the Future in conjunction with the GSA & IET International Semiconductor Forum on May 12. The panel addressed challenges in attracting young talent to the A/MS field, best practices that could be used to peak students’ interest in A/MS, how to encourage universities to have stronger education in A/MS, how to keep A/MS talent within Europe, and new A/MS solutions being developed within universities and institutions that are tackling the most advanced design challenges. 7 p8 R+ S% ^$ j, i1 h5 ^/ y ' Z0 B, j C2 tMore than 80 delegates attended to hear the perspectives of moderator Tim Hamer, director of knowledge management, The Institution of Engineering and Technology (IET), and panelists Dr. Derek Boyd, chief executive officer, NMI; Gary Duncan, vice president of engineering, Dialog Semiconductor; Thomas Riener, senior vice president and general manager, Full Service Foundry Business Unit, austriamicrosystems; Dr. Willy Sansen, professor emeritus, K.U. Leuven; and Josef Sauerer, head of department - analog IC development, Fraunhofer Institute for Integrated Circuits IIS.作者: tk02376 時間: 2011-5-20 09:23 AM
Analog and mixed-signal content is increasing, with the wireless market, specifically smartphones, growing at an exponential rate. While this creates great opportunity for analog/mixed-signal IC suppliers, opportunity comes with challenge. IC design is becoming increasingly complex as we move to the leading edge. For Europe to remain a competitive player in analog/mixed-signal, its universities must produce students that can develop new solutions that tackle the most advanced design challenges., K2 u7 a# y6 ?+ k. |1 S
( S) O, r! f# g) o7 iThe findings of the panel discussion suggested the responsibility of cultivating an environment where Europe’s A/MS industry and its talent can flourish should be shared by many, including government, semiconductor companies, universities, industry associations and research institutions. The panelists stressed the importance of the European Commission voicing that semiconductors are indeed a key enabling technology; chip companies partnering with universities and employing graduates to validate there is a career in A/MS; and educating students at a very young age what is possible with math, physics and engineering.作者: tk02376 時間: 2011-5-20 09:24 AM
“In June 2009, GSA’s Europe RF/Analog/Mixed-Signal Working Group recognized the importance of establishing Europe as a center of excellence for A/MS and fostering job creation and innovation,” stated Sandro Grigolli, GSA’s EMEA Executive Director. “It is events like the May 12 panel discussion that showcase Europe as an innovative hub which needs the support of its universities, government, industry organizations and semiconductor community to remain competitive. GSA will continue to be part of this support system.” ' Q& _1 {0 S$ D- i5 v8 l+ F) |& a+ _& q: X* i7 R
About GSA: : r% a% d5 V9 |' E; Q
The Global Semiconductor Alliance mission is to accelerate the growth and increase the return on invested capital of the global semiconductor industry by fostering a more effective ecosystem through collaboration, integration and innovation. It addresses the challenges within the supply chain including IP, EDA/design, wafer manufacturing, test and packaging to enable industry-wide solutions. Providing a platform for meaningful global collaboration, the Alliance identifies and articulates market opportunities, encourages and supports entrepreneurship, and provides members with comprehensive and unique market intelligence. Members include companies throughout the supply chain representing 25 countries across the globe. www.gsaglobal.org作者: ranica 時間: 2011-7-19 06:03 PM 本帖最後由 ranica 於 2011-7-19 06:05 PM 編輯 3 u# c0 ]! G% V
7 _: R: v$ g) H# v, s, K* O ^招聘公司:A famous IC company: t. \3 B7 O a/ r- M, W
招聘岗位:Analog Mixed Signal Design Engineer 2 t7 Y5 s# k0 |. R9 w2 K6 |* R工作地点:Shanghai , Q( r: V ~% v+ W' ]) R# j5 s ?3 M% `
岗位描述: 1 _* }4 q! }- X' i) hJob Summary As an Analog Mixed Signal Design Engineer you are member of one or our PMU product development teams that are defining and finalizing design solutions, from feasibility study to complete qualification and production. As a Mixed Signal Analog Design Engineer, you will be developing analog IP and analog blocks for energy & power management IC. These IPs are then integrated within IC & you play an important role in the mixed signal integrated circuits design. The role will cover the full IC design cycle from specification through to testing of engineering samples.作者: ranica 時間: 2011-7-19 06:05 PM
Key Areas of Responsibility 1. Carry out development activities from design, verification to physical validation for mixed signal integrated circuits (Analog, power and digital blocks) for power management IC; - Accountable for proper execution (schedule) & quality of own design - Ensures integrity & documentation of own design 2. Interface with layout team, performing or providing guidance for layout design and controlling layout design and work quality; 3. Evaluate the product with application team to meet customer specification; 4. Debug product to fix incorrect operation and meet customer specification; 5. Works with a project leader to identify tasks and plans; Reports execution progress to support project management 6. Work with an architect to define block specification, simulation, verification and physical validation plan; 7. Work with other team members to build up design knowledge and improve way of working (Continuous improvement & Lessons Learnt) 8. Develop his/her leadership on his/her domain of skills and actions. -Innovations, technologies, methodologies,… 9. Coaches less experienced colleagues when needed or asked for. & y7 X7 h8 [7 a" p) o2 Z5 z0 c; U# i1 v$ C# m& Q- \! X9 `8 Y1 z) K I
职位要求:5 p0 J# U( z$ x! b% q
Requirements 1. BSEE with minimum of 6 years or MSEE with minimum of 2 years analog design experience; 2. Experience designing any or all of the following: DCDC, Charge pump, LDO, amplifier and comparator; 3. Familiar with CAD tools and environments, i.e., design workstations and UNIX; Familiar with Cadence Spectre, Virtuoso Layout XL; 4. Experience in analog layout design and physical validation; 5. Ready to travel (multi-sites R&D developments) 6. Open in communication 7. Good command of English (multicultural environment); 8. Good team-worker with a pro-active attitude; 9. Experience in AMS Top Level Verifications is a plus 10. Experience in CAD support (CAD methodologies and tools) is a plus 11. Experience in PCB design, instrument and measurement, lab skills, and lab evaluation is a plus. ) y' ?8 O3 y0 T7 q9 a
4 q3 K0 [2 r' V6 M. q/ C u能者與意者請email研發簡歷與chip123聯絡。作者: mister_liu 時間: 2011-7-22 12:14 PM
招聘公司:A famous IC company, D& Z3 C3 d6 i5 R3 h
招聘岗位:Analog Design Engineers2 o4 Y$ P* H! V x
工作地点:shanghai ! X3 o5 ^8 D* d% l6 R3 k& Q; }( D9 G. @0 N! G. @) l
岗位描述: 2 k9 o# ~( k2 n0 C; J( AResearch, definition, design, simulation, layout supervision, characterization and release to production of high-performance state of the art BICMOS, video integrated circuits. The integrated circuits will typically include the following blocks: ( H7 ]+ r$ [( T+ a4 G( b S
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Video Amplifiers $ e6 m* y4 E1 h8 O8 }
DC-to-DC converters, LDOs, PORs 7 W8 J5 D. u' Z7 Y6 K
Interface Circuits –SPI, I2C, LVDS, … 8 P9 E; D5 N# c( X" Q' J! d
Bandgaps and references ! _* {: j+ e* n
Voltage monitors ; Y9 J) |$ }/ e3 d8 Q. {) f1 L* z/ vAnalog-to-digital and digital-to-analog converters/ W' H V/ {7 x5 Q# P4 h& q$ Z# E; A
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职位要求Job requirements - 2 b. T+ S3 ~7 `% T! D# {MSEE degree, with at least 1+ years of design experience. ' E2 b5 F3 z3 ^" RHands-on design experience with BiCMOS/CMOS mixed-voltage custom circuit designs ! j; G6 T1 n \6 M. q+ V* }. g
Must possess strong intuitive and analytical understanding of transistor-level design and simulation 6 Z7 h( Y, b0 a7 }Must understand placement and layout issues with respect to mixed-signal IC’s 2 j3 K) \+ [' }! ^3 v( N5 T' tMust be familiar with Cadence mixed signal design flow. 9 R9 l1 \- ~$ \6 P- E
Good English communication skill作者: jcase 時間: 2011-8-3 07:48 AM 標題: 測距儀放大電路設計專案 專案詳細說明 ! [* r% b5 @& j/ K# u: q" G5 }
' `/ W2 q2 C+ ?/ w# G1 q& @! F1.工作內容:我要發包測距儀放大電路設計 2 b; C3 Q! [" g) g, U2 C2.配合時間:要為期3個月 j" z2 W1 Y. k$ `* p7 V5 \; t1 T
3.配合地點:發包後可在家作業. R" ?$ D* Y; ?: v% J1 U; T7 L
4.專案預算:5千~10萬 ( W: b& o8 I; ?5.注意事項:不限資格,只要有能力做的出來就給機會嘗試 " f/ R1 q* v W+ R) L$ s7 C 9 O$ G+ `& h. o3 P2 t" s所需專長說明 4 W2 B5 z) M+ W/ s0 z1 i
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電子電路設計作者: jcase 時間: 2011-8-5 08:36 AM 標題: RF硬體外包專案 專案詳細說明 1 a3 e$ y; d1 j* a
' ]6 V1 N0 `* b9 P0 B# c1.工作內容:我要發包有能力設計RF硬體的工作 + W4 t, |( g% r( O2.配合時間:要面議, X9 g# a n y/ C0 c9 d
3.配合地點:發包後作業地點均可5 r9 {/ ?# `& `; M# J
4.專案預算:面議2 A) ^ X1 r0 ~" Z C
5.注意事項:需有實際外包經驗者並2年以上作者: ranica 時間: 2011-8-10 05:31 PM
招聘公司:A famous IC company C8 m9 c% E% x- T% B: O招聘岗位:RF FAE : k) k$ I. b) ~0 h' D$ ~工作地点:Xi'an( w! X e% W" |( a2 X+ l) ?
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岗位描述:" E1 y" p9 f+ c
Job Description Delivers technical expertise, application support and design services to customer based on XX RF products for mobile terminal and infrastructure area. Understands customer’s requirements & problems, recommends components solutions to meet their needs, and ensures customer satisfaction. Able to provide circuits debugging, simulation and EVAL boards modification for the customer Integrates XX products into customer’s environment. Ensures the product functions per specifications. Deliver training classes and consultant services to customers and channel partners. Work with division marketing team to implement market strategy in China, collect/analyze market info and involve in new product definition.% u7 T+ j F# I" V: J3 U: `1 d
. U' P& d8 j# A' C职位要求: w/ w) t/ N6 R( k: |
Requirement Bachelors or Master Degree or University Degree or equivalent, major in Electronics Engineering or relevant. A minimum of 5 years of experience in RF circuits design /debug or relevant experience. Expertise and experience for (EVDO/UMTS/TD handsets design) is the plus. Excellent interpersonal skills and teamwork. Excellent command of English. Available for both oversea and domestic travel.作者: ranica 時間: 2011-8-10 05:37 PM
招聘公司:A famous IC company5 c0 w2 o! N; j
招聘岗位:Staff Engineer for International Standard ) ^7 {+ W# v5 s6 F
工作地点:Shanghai % ?2 V- l7 `& k' b+ _ , A5 U+ Y5 h6 _" Z' S岗位描述:% g9 G4 Y* K3 t4 I
1. Key responsibilities/duties: 1. Develop International standard for Wireless Power 2. Organize and participant monthly international meeting 3. Involve in prototype and reference design 4. Customize and design test manual, criteria and standard 5. Customer application support, development of and understanding of customer applications in embedded programming languages (C- and ASSEMBLY, primarily) 6. Understand customer applications and play a key role in feeding back market needs to the marketing organization. 7. Development of application notes and design notes for customer-specific or application-specific projects. 8. Provide the technical interface to customers and sales force during prospecting, evaluation, design-in and post-sales phases. 9. Assist Product Engineering in the analysis of field returns (FA and RMA). 7 m1 v, {7 ^5 b1 n9 }9 v 9 s7 ]- H6 L. Y! j9 ^: D$ _职位要求:6 M6 l) F+ }& P5 H
Required skills 1. Overseas working experience or study 2. Vey fluent oral English and excellent written skill is mandatory 3. Good marketing sense and presentation skill 4. Project Management skills 5. Embedded C-programming for microcontrollers. Experience from AVR, MSP430, PIC, HCSxx, ARM or other architectures a benefit. 6. Preferred industry experience in semiconductors industry with embedded applications or microcontrollers. 7. Power design experience is highly expected 8. Project Management. skills 9Former international standard experience is a big plus 10. MBA is preferred作者: ranica 時間: 2011-8-11 03:36 PM
招聘公司:a top 15 semiconductor company 9 D, ?& A+ l0 F- ]招聘岗位:Application Engineer – Transceiver ; a+ _( v \3 z7 i' S. S. K2 u工作地点:Shanghai 9 e3 @' j1 x* M' w$ N, C/ Z. Q+ b$ h& K
岗位描述:6 R; ]9 P# t+ c* `! Y. w/ R
Responsibility · Support transceiver key customers in device evaluation, system structure recommendation, schematics design and layout, problem diagnosis and trouble shooting, performance testing and benchmarking · Develop and customize reference/sub-system designs to demonstrate both component and signal chain level features, performance and advantages, including localized evaluation boards, sub-system boards and customer system boards · Facilitate new product definition and development by actively working with local and product line team members to gather requirements, generate technical spec and benchmark performance · Providing technical assistance and trainings to field application and sales teams · Setup and operate both internal and external labs in the region* A8 r' \% `- t3 M: a$ v' \
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职位要求: , D; n/ k9 b/ f) O7 j# ^Qualifications · MSEE/PHD, 5+ years of communication analog front-end design related experience o Signal chain level understanding to RF, ADC/DAC, Digital Filtering o Circuit simulation, test and performance measurement o Schematic design and layout experience o Skilled on lab equipments · Solid knowledge in wired/wireless communications systems is preferred · Good written and verbal communications skills in both English and Mandarin · Time management skills, multi-tasking ability and team player · Willing to travel frequently in China and aboard作者: ranica 時間: 2011-8-19 02:18 PM
招聘公司:A famous IC company& y' @& N" t! K l+ v
招聘岗位:Power system development director 7 \+ k q% R( n/ R- Z ~工作地点:Shenzhen/Nanjing4 a$ a; z6 e# K& N$ \
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岗位描述:2 _8 Y* ~3 a& T0 @$ J" \- K) P" G5 V
1) 领导10人左右的FAE/AE团队为客户开发电源系统模块,并为客户解决各种调试、生产中遇到的问题; * Q6 g2 [6 L; ?) {2)指导公司ic设计人员开发前的系统设计,把客户的最新希求提供给ic设计人员。 # }* X: D: a& \, |3)大专以上学历,20年左右的小功率开关电源(LED驱动,手机充电器,适配器等)开发经验,具有丰富的生产调试经验。作者: ranica 時間: 2011-8-19 02:33 PM
招聘公司:A famous American IC company k8 G8 o q0 Y, h6 I招聘岗位:Product Applications Director / L5 z/ p+ p# F工作地点:Shanghai7 p8 J, j$ `) K7 T, F
- G/ q, I: @/ x- I8 Y岗位描述: 3 p w* ^) X2 I. Z, [: hJob Description Responsible for managing a fast growing system level development organization including: - r% M1 Q! P, k( h5 {- managing the software development team, the firmware team, the hardware team and the validation team. % E! R3 F$ P9 Z( K* q+ l: }# y5 `- hiring, coaching and training the expanding team members. / e4 Z( m2 c2 G$ a; n0 B$ Q- developing and completing customer projects per schedule - transferring projects through NPI to production 9 O* u! _; X: O- h5 u9 ^, w/ S2 a
- improving development processes and efficiency - developing and creating next generation platforms and technology.! Q7 M5 z5 i/ q; ~* k3 q e
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职位要求:5 k( h" S/ _( I0 l. n% i
Specific Requirement Experienced manager with technical knowledge related to software, firmware, hardware and new product introduction.作者: ranica 時間: 2011-8-30 02:15 PM
招聘公司:A famous IC company - E6 l+ R+ x- L6 D% B$ N招聘岗位:Principal RF/Mixed-Signal IC Design Engineer % S; C3 ^+ I% q1 I" [; R: ?工作地点:U.S.! B" U/ E8 l6 W; w% c$ [9 ]2 p; p
% I, W, e" Q( o1 [! L岗位描述:, s( R* q1 q6 ?( F
Job Description 6 P% n; P* ^8 c0 |7 t• Lead the architecture and IC implementation of high-performance RF, frequency synthesis, data conversion, and signal processing circuits for xx’s next-generation products. & Q& {# C- T/ @- f1 e
• Lead the development of new circuit topologies and design techniques. 0 T- \% g2 a( _$ G
• Work with Communication Systems and RF Systems engineers to translate system level specifications to block level specifications, and use deep knowledge of state-of-the-art circuit techniques to optimize the system architecture. 4 p8 j- h; P% i+ q• Work with ASIC and physical design engineers to integrate and verify the design at top level. 9 L5 X7 |3 _4 X& I Q0 ~ d( R+ Y• Take designs from product definition through tapeout, characterization, and release to high-volume production with high yields and robust performance.作者: ranica 時間: 2011-8-30 02:15 PM
职位要求: 3 l4 ?. g6 `; }* |& t' e; j4 QRequired Skills Experience and Skills Needed: ) o4 t' [- H3 y' _% {% E& y. @• Must have a strong academic background with 7+ years industry experience in at least one of the following areas: o Analog/Mixed-Signal: data converters, filters, analog building blocks o PLLs and frequency synthesis: integer-N and fractional-N PLLs, DLLs, crystal oscillators o RF: LNAs, mixers, filters, PAs, and microwave circuits 3 W0 w( I! V& P5 m8 Z7 A• Must have IC tapeout and productization experience, and should have hands-on experience leading the test and debug efforts for products. z) r* P! J+ V: |% e• Should have familiarity with wireless or wire-line communication standards and how high-level requirements translate to block-level specifications. Q1 ~- X+ }7 d% U
• Must have experience with industry-standard simulation and design tools, such as Spectre, Spectre RF, Virtuoso, and Matlab. Education/Training Needed: 0 {$ p6 q9 \( Q6 B3 p1 a8 Y
• Master of Science (w/ research thesis) or Ph.D. in Electrical Engineering. $ j' r0 \' p2 H/ w2 t" x5 j• 7+ years industry experience.作者: ranica 時間: 2011-8-31 03:04 PM
招聘公司:A famous IC company# t( i' U0 s5 _7 T5 O4 f
招聘岗位:Sr Manufacturing Engineer% p: H8 r/ k4 G1 O% u. r5 b4 H
工作地点:Shanghai + p# ]! C: y* F" v * d q5 Q5 Q! K0 |: R2 G岗位描述:Purposes$ }: r2 @7 G3 U$ i* f& Q
1. Responsibility for performance of assigned supplier factory to meet the expectations of XX BU.2 V6 G# [! Y7 N6 O3 ]
2. Proactive monitor and anticipation of material flow constraints.! w6 N& O4 d7 C% q6 Y" E
3. Interface with Supplier resources and XX resources in reaching to constraints and solutions.* N. g: a+ R4 Z% d9 s- r
4. Communicate with suppliers, Corporate planning team and BU planers as appropriate with the goal of achieving WW Corporate goals.! @5 H/ l- _+ p( u! m5 e- m
5. Ensure tracking system supports the need for New Product introduction and Evaluation.( L: {$ y$ S: |" M# R; \
6. An understanding of all capacity requirements, availability and bubbles to support BU requirements.; X8 @9 N3 s% ?. [' \! S
7. An understanding of weak links of the assigned supplier in responsiveness.$ b6 l0 r/ X1 R$ F" q' l7 [4 A9 ]
8 D! h* ]" y) [1 m$ LResponsibilities:' a7 O3 t o3 m" S/ L5 z: u' w" d
1. Establish both Leading and Lagging Indicators to track the performance of the assigned Supplier factories. . H, Y. y: g6 b* O& C2. Establish measurement of performance indicators for XX consigned equipment.5 k0 i4 O6 y0 [
3. Review/establish proactive and reactive measures or warning systems in relations to performance tracking.) A9 u+ U3 F! `/ z+ t4 L
4. To drive the assigned suppliers on continuous improvement specified in cost elimination roadmap. 1 M+ o; o4 N5 j( U' x* A3 q" k5. Ensure supplier processes are in compliance to XX requirement. 6 s/ X8 Q! I" b/ N1 D6. Establish reporting and visibility of performance on a preferred frequency to provide early warnings of performance issues.6 u, f7 \4 U- _$ Y5 v
7. Take complete ownership to interface with relevant supplier resources and XX Engineering, QA, Planning and Management to ensure resolute ions to any negative trends. 7 i# B5 ?, m9 a* [$ ^8. Responsible to lead a business Process review of the assigned supplier sites for management.& h, r* ^) C8 ]: w' h/ |8 T- ~7 S8 p
9. Implement the processes standardization, good manufacturing practices, lean manufacturing among the suppliers to improve overall performance. p' @4 |4 ?, B10. First person of contact on all XX operational issues for the assigned supplier.: p0 B. L4 z" [. K6 x
11. Establish relationship and network with direct and direct suppliers to obtain information on costing and any other relevant processes for use in the expectation of Continuous improvement.8 M& [' h/ p2 G2 R5 g+ ]9 r& C% n
12. Provide leadership role on all Operational matters.作者: ranica 時間: 2011-8-31 03:04 PM
Measurements: 5 c" s/ }% J+ v+ }2 D( b1. Quantitative improvement of the selected Leading and Lagging indices. 6 [$ W+ i2 }* g2 M& m, a; ?( |4 i& d2. Utilization of consigned equipment. . b4 k0 U. i1 h2 S3. Cost improvement contribution from NVA elimination. " a7 c \2 d0 T$ a; L4 p2 K" q9 Y4. Identifying activities that will add up to the 80pet elimination visibility. 1 s. m: a8 r. D* P. e- Q5. Joint ownership of performance measurements of Planning, Engineering, Test and QA.+ ~# `) u7 ], j) h, j7 y5 p
Note: The above measurement will be quantified after analyzing the historical date. - o1 {$ |( e% }5 _2 GInteract With All functions related Quality, Delivery, Cost and business process.0 c$ U7 g; F9 k& n' e' {
2 y& _9 k# G: {0 G6 g职位要求:Requirements (Mandatory)* S3 w/ x, e6 @& F3 [. ~
1. Minimum 7-10 years in Planning, experience in Project Management, product line transfers with minimum 2 years managerial role.1 Y7 b: e' T6 k) h4 w, ~6 s9 S
2. Experience in managing project by interfacing/dependence with teams not directly reporting to the candidate.8 C! }' t2 ?( j n: X
3. Minimum a tertiary educations in Industrial/Operations Management3 L+ Y5 ^0 z. ]9 X
4. Experience working in high volume IC manufacturing company for more than 5 years# z9 C% F. m2 ?/ m! G+ Z; o0 {
5. Good communication and leadership skill 4 J4 V1 B. R% |! O3 k6. Able to travel- y/ q- r7 d/ Q8 M7 H
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Other Attributes2 L! r; E/ q( K1 T( }' N
1. Communication skills, interactions skills h3 Z$ n6 H+ f" _! U2. Working exposure in high volume IC subcontracting environment in managerial role is an added advantage, N' X% W' m, ]- Z
3. Good knowledge of process mapping for problem solving4 j$ k4 f+ ~2 `+ @
4. Good knowledge computer application作者: ranica 時間: 2011-8-31 03:05 PM
招聘公司:A famous IC company% G, E2 d# r9 [( U$ B
招聘岗位:Sr. Foundry Yield Engineer 5 S5 U( L3 A8 k! o: E6 N" h+ z工作地点:Shanghai5 P% `' H5 Z( r+ E& L) o, ?
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岗位描述: & ^* G3 S N c5 j' B0 B$ R) KSUMMARY Primary responsibility is to manage the foundry die yield compensation program and process for all foundry sites. Additional responsibilities related to Foundry Product yields are also likely. ESSENTIAL DUTIES AND RESPONSIBILITIES include the following. Other duties may be assigned. Assist with the process transfer project Maintain the RMA/Scrap die yield limits for each product for each foundry Maintain the Target Yields & Yield Agreement Tables with each Foundry Calculate the quarterly die yields vs. plan for each foundry product Determine primary causes of gaps between planned and actual die yield Determine & consolidate the credit/debit for each foundry for each quarter Report the RMA and DYS results for each foundry each month SUPERVISORY RESPONSIBILITIES None QUALIFICATIONS To perform this job successfully, an individual must be able to perform each essential duty satisfactorily. The requirements listed below are representative of the knowledge, skill, and/or ability required. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions. Excellent statistical knowledge and skills. Proficient with Spotfire, Jump, Klarity Ace. Problem solving skills - analyzing data, understanding risk, making decisions. Good people skills - listening, communication, mentoring, and negotiation. Technical skills – Knowledge in all areas of wafer fab processing. Knowledge of device theory, WAT tests, Data correlation skills, FA methods, CMOS devices and NVM devices. Multitasking - ability to drive priorities across several fronts simultaneously. Presentation skills - ability to present and communicate information to senior management. Must hold an electrical engineering degree with at least 5 years experience. Demonstrated ability to work independently and follow through on long term projects作者: ranica 時間: 2011-8-31 03:05 PM
职位要求:; ?7 Z9 z' S& l3 H; \ @# G+ W
EDUCATION and/or EXPERIENCE Bachelors degree and 5+ years Fab process engineering/yield engineering experience. LANGUAGE SKILLS Ability to read, analyze, and interpret common scientific and technical journals, financial reports, and legal documents. Ability to respond to common inquiries or complaints from customers, regulatory agencies, or members of the business community. Ability to write speeches and articles for publication that conform to prescribed style and format. Ability to effectively present information to top management, public groups and employees. Fluent speaking, reading and writing in English. MATHEMATICAL SKILLS Ability to work with mathematical concepts such as probability and statistical inference, fundamentals of plane and solid geometry, trigonometry, calculus, matrix manipulation and device physics. Ability to apply concepts such as fractions, percentages, ratios, proportions and analysis to practical situations. Ability to apply advanced mathematical concepts such as exponents, logarithms, quadratic equations, and principles of algebra. Ability to apply mathematical operations to such tasks as frequency distribution, determination of test reliability and validity, analysis of variance, and correlation techniques. Ability to work with concepts such as limits, rings, quadratic and differential equations, and proofs of theorems. INTERPERSONAL SKILLS Ability to define problems/issues, collect data, establish facts, and draw valid conclusions. Ability to solve practical problems and deal with a variety of concrete variables in situations where only limited standardization exists. Ability to interpret and apply principles of logical and scientific thinking to a wide range of intellectual and practical problems. Ability to deal with several abstract and concrete variables. Ability to deal with nonverbal symbolism (formulas, scientific equations, graphs, etc.) in its most difficult phases. Ability to interpret/analyze a variety of problems, instructions and issues furnished in written, oral, diagram, or technical form. Ability to communicate internally and externally with all levels of an organization and to participate in problem solving/quality improvement activities. Ability to work independently. ESSENTIAL FUNCTIONS While performing the duties of this job, the employee is regularly required to sit and talk or hear. The employee is occasionally required to stand; walk; operate keyboard; operate controls; simple grasping; firm grasping; fine pinching; reach with hands and arms . The employee must occasionally lift and/or move up to 10 pounds. Specific vision abilities required by this job include close vision, distance vision, color vision, peripheral vision, depth perception, and ability to adjust focus. WORK ENVIRONMENT The work environment characteristics described here are representative of those an employee encounters while performing the essential functions of this job. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions. The noise level in the work environment is usually quiet.作者: ranica 時間: 2011-9-6 02:04 PM
招聘公司:A famous IC company " F. s% g) }4 T* N招聘岗位:Product Engineer & ^8 Q1 _" F5 r0 I, D9 C3 ?工作地点:shanghai1 k# {! F# V! Y$ ^
# H6 L" r% n$ i职位要求:* b7 v. E+ e1 a& y5 T/ d0 J
Hands-on experience with analog IC lab verification and be familiar with lab equipments + L5 F s) c) i N- W( lBoard-level op amp design experience – 2yrs+7 w/ ~, ?! L% M! z9 A! s6 G+ W
Pspice simulation of analog circuits – 2yrs+* X+ i' ^* {1 G0 B7 ^ l9 i+ | i
Should have ability to write Pspice models. 7 ~/ r+ B' o' I4 K6 l0 aEducation >= Bachelors in EE - ~4 _ _0 D7 `6 J& SGood English communication skill作者: ranica 時間: 2011-9-6 02:06 PM
招聘公司:A famous IC company o; h% P$ V. C# m7 O) @; @* Y招聘岗位:Sr Manufacturing Engineer ) R8 A3 f9 {; o工作地点:Shanghai - q: V6 |0 G6 m/ h* o 4 \8 P! N6 P4 h+ T0 y岗位描述:Purposes . ?, \1 P: P+ G7 a. G$ H1 V$ J* K1. Responsibility for performance of assigned supplier factory to meet the expectations of XX BU. + U2 I" u; t: C) o2. Proactive monitor and anticipation of material flow constraints. ' W% o1 ~1 w/ a9 O/ [3. Interface with Supplier resources and XX resources in reaching to constraints and solutions. ; |% A/ X8 A( B1 Y4. Communicate with suppliers, Corporate planning team and BU planers as appropriate with the goal of achieving WW Corporate goals.8 m8 W6 Q3 ]9 C1 \# b/ D; B n: r
5. Ensure tracking system supports the need for New Product introduction and Evaluation. ; {) t+ a5 N1 b! a% v+ V& n6. An understanding of all capacity requirements, availability and bubbles to support BU requirements. 4 [; [2 p) h5 j' M+ r) o- h! K7. An understanding of weak links of the assigned supplier in responsiveness.7 _+ g* M$ x) N
9 y7 @) Y9 R, K% k2 X& I
Responsibilities:" @. {1 m3 }" b: o
1. Establish both Leading and Lagging Indicators to track the performance of the assigned Supplier factories." J! ^$ ]9 T+ j9 A5 `! a3 J
2. Establish measurement of performance indicators for XX consigned equipment. 2 y6 G) E5 U5 e* t3. Review/establish proactive and reactive measures or warning systems in relations to performance tracking. ! j9 ^ J- s, C) N4. To drive the assigned suppliers on continuous improvement specified in cost elimination roadmap. 2 x8 m B, w* K5. Ensure supplier processes are in compliance to XX requirement. ; m' n9 j( a" P8 _; S+ O! Y6. Establish reporting and visibility of performance on a preferred frequency to provide early warnings of performance issues. _( k9 ^: a8 i9 D9 ^4 e: w7 o2 k7. Take complete ownership to interface with relevant supplier resources and XX Engineering, QA, Planning and Management to ensure resolute ions to any negative trends. 1 [$ ?' S% S' N+ n# F& n8. Responsible to lead a business Process review of the assigned supplier sites for management.( D1 Y! W7 N3 D |; D k& S
9. Implement the processes standardization, good manufacturing practices, lean manufacturing among the suppliers to improve overall performance. - Z! X- Q. U2 Q10. First person of contact on all XX operational issues for the assigned supplier. " }" X4 H$ A" ~/ G' I11. Establish relationship and network with direct and direct suppliers to obtain information on costing and any other relevant processes for use in the expectation of Continuous improvement. + i" g4 t( k6 k2 h3 _: F4 r& x12. Provide leadership role on all Operational matters.作者: ranica 時間: 2011-9-6 02:06 PM
Measurements:2 i' l; `; ~! ~5 }( O y5 R: f0 Q& d2 E% Y
1. Quantitative improvement of the selected Leading and Lagging indices. / y5 g1 v d. o# l6 e+ i/ @2. Utilization of consigned equipment. + B: h3 K1 d& ]! \) I v3. Cost improvement contribution from NVA elimination. 2 @' {- e8 `9 G& b4. Identifying activities that will add up to the 80pet elimination visibility. + d& ], o7 s1 P; o3 l5. Joint ownership of performance measurements of Planning, Engineering, Test and QA. 5 b/ }( M. F) x e# [3 ?9 f. j* rNote: The above measurement will be quantified after analyzing the historical date.* U+ t( u7 ~) T. o
Interact With % y8 d- W u# \+ c& y1 h/ ~" E7 oAll functions related Quality, Delivery, Cost and business process.8 D5 v# e3 l/ I$ ?* g1 L; C8 V# {
- M. d, d: w' K( m0 J! T9 u- H职位要求:Requirements (Mandatory)8 \8 n* y* j' P9 i$ H" N
1. Minimum 7-10 years in Planning, experience in Project Management, product line transfers with minimum 2 years managerial role. 5 X: ?8 g) p; E. J2. Experience in managing project by interfacing/dependence with teams not directly reporting to the candidate. * B5 b4 M/ {' R s4 }2 S3. Minimum a tertiary educations in Industrial/Operations Management$ L1 e6 z$ M7 S- z4 k
4. Experience working in high volume IC manufacturing company for more than 5 years/ y; l$ o& t% R0 n) X1 B: r! `
5. Good communication and leadership skill* d4 s1 w- l8 P3 s" P8 ]- Y J$ {
6. Able to travel + }/ H* [! w4 G4 R' K; M0 N1 s( h5 O" U/ i9 H1 C1 i
Other Attributes 9 j4 j [# H8 e7 L, R/ E1. Communication skills, interactions skills" M$ _0 c$ j3 C
2. Working exposure in high volume IC subcontracting environment in managerial role is an added advantage# M& S6 R5 _% Y' s& F. A
3. Good knowledge of process mapping for problem solving8 j) U% [7 V( B5 C/ Z
4. Good knowledge computer application作者: ranica 時間: 2011-9-6 02:08 PM
招聘公司:A famous IC company ( q" `0 q: w8 r# [/ Y: Q招聘岗位:Sr. Foundry Yield Engineer ' z5 M4 \2 U0 H7 C" s7 N# [工作地点:Shanghai9 T5 R/ o, K3 T8 P0 U
8 \( Y. |; N7 i8 g7 ?+ F岗位描述: " u2 { g7 e3 d0 W7 aSUMMARY Primary responsibility is to manage the foundry die yield compensation program and process for all foundry sites. Additional responsibilities related to Foundry Product yields are also likely. ESSENTIAL DUTIES AND RESPONSIBILITIES include the following. Other duties may be assigned. Assist with the process transfer project1 O0 _. J7 U$ e) b4 [+ J" K2 x; K9 Z- h
& T% u) K! c/ r$ t, m6 A Maintain the RMA/Scrap die yield limits for each product for each foundry" o( \3 S: F- Z8 l0 I
Maintain the Target Yields & Yield Agreement Tables with each Foundry+ [; }& M1 m7 _: o. j0 v7 ?8 k! d
Calculate the quarterly die yields vs. plan for each foundry product Determine primary causes of gaps between planned and actual die yield : N5 L, k, B- D: \+ }2 {1 a Determine & consolidate the credit/debit for each foundry for each quarter & S) D% ?! U/ a: s, i) f Report the RMA and DYS results for each foundry each month SUPERVISORY RESPONSIBILITIES None QUALIFICATIONS To perform this job successfully, an individual must be able to perform each essential duty satisfactorily. The requirements listed below are representative of the knowledge, skill, and/or ability required. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions. Excellent statistical knowledge and skills. Proficient with Spotfire, Jump, Klarity Ace. Problem solving skills - analyzing data, understanding risk, making decisions. Good people skills - listening, communication, mentoring, and negotiation. Technical skills – Knowledge in all areas of wafer fab processing. Knowledge of device theory, WAT tests, Data correlation skills, FA methods, CMOS devices and NVM devices. Multitasking - ability to drive priorities across several fronts simultaneously. Presentation skills - ability to present and communicate information to senior management. Must hold an electrical engineering degree with at least 5 years experience. Demonstrated ability to work independently and follow through on long term projects作者: ranica 時間: 2011-9-6 02:08 PM
职位要求: [) H& [; X. [: J. ?. h! q9 F
EDUCATION and/or EXPERIENCE Bachelors degree and 5+ years Fab process engineering/yield engineering experience. LANGUAGE SKILLS Ability to read, analyze, and interpret common scientific and technical journals, financial reports, and legal documents. Ability to respond to common inquiries or complaints from customers, regulatory agencies, or members of the business community. Ability to write speeches and articles for publication that conform to prescribed style and format. Ability to effectively present information to top management, public groups and employees. Fluent speaking, reading and writing in English. MATHEMATICAL SKILLS Ability to work with mathematical concepts such as probability and statistical inference, fundamentals of plane and solid geometry, trigonometry, calculus, matrix manipulation and device physics. Ability to apply concepts such as fractions, percentages, ratios, proportions and analysis to practical situations. Ability to apply advanced mathematical concepts such as exponents, logarithms, quadratic equations, and principles of algebra. Ability to apply mathematical operations to such tasks as frequency distribution, determination of test reliability and validity, analysis of variance, and correlation techniques. Ability to work with concepts such as limits, rings, quadratic and differential equations, and proofs of theorems. INTERPERSONAL SKILLS Ability to define problems/issues, collect data, establish facts, and draw valid conclusions. Ability to solve practical problems and deal with a variety of concrete variables in situations where only limited standardization exists. Ability to interpret and apply principles of logical and scientific thinking to a wide range of intellectual and practical problems. Ability to deal with several abstract and concrete variables. Ability to deal with nonverbal symbolism (formulas, scientific equations, graphs, etc.) in its most difficult phases. Ability to interpret/analyze a variety of problems, instructions and issues furnished in written, oral, diagram, or technical form. Ability to communicate internally and externally with all levels of an organization and to participate in problem solving/quality improvement activities. Ability to work independently. ESSENTIAL FUNCTIONS While performing the duties of this job, the employee is regularly required to sit and talk or hear. The employee is occasionally required to stand; walk; operate keyboard; operate controls; simple grasping; firm grasping; fine pinching; reach with hands and arms . The employee must occasionally lift and/or move up to 10 pounds. Specific vision abilities required by this job include close vision, distance vision, color vision, peripheral vision, depth perception, and ability to adjust focus. WORK ENVIRONMENT The work environment characteristics described here are representative of those an employee encounters while performing the essential functions of this job. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions. The noise level in the work environment is usually quiet.作者: ranica 時間: 2011-9-8 10:57 AM
招聘公司:A famous IC company 7 X% v8 p3 a; a招聘岗位:Senior Design Engineer ( PCM) g8 w; g; ~' f. b3 N* j4 J工作地点:Shanghai 4 E& ?) E( V/ R3 H0 C' O* r: V) r1 ]5 G2 X% b
岗位描述:" [5 W. `1 p' }, i7 z) V) l
Job Description and Responsibilities: -Circuit design for phase change memory development. " Y" |: S% _; F% F 4 V% F$ F8 ]1 n, g" {* c. g职位要求:$ S2 l9 A! w7 h1 t; c9 w4 q
Key Competency Requirements: -Technical knowledge in IC design methodology; -Experience of Phase change memory/ non-volatile / flash memory a definite advantage; -Knowledge of Verilog, Synopsys synthesis / simulation tools, HSPICE, Cadence Design Entry, IC layout tools, Dracula, Silicon Ensemble or other equivalent tools. Education and Experience Required: -MS degree or above; -With more than 3 years of design experience; -Preferred:Some Analog/Layout design related experience and some Process/Technology related experience.作者: ranica 時間: 2011-9-8 10:58 AM
招聘公司:A famous IC company- X; x' ~: y, Y5 ^
招聘岗位:Principal RF/Mixed-Signal IC Design Engineer* J$ M7 I1 v) y; [$ H; P5 a4 v
工作地点:U.S. / Z' B" {- u! d% c- Z" I; V' @ g( x: l8 p: S8 s. g* L! X岗位描述:, j; O L# A5 [8 u( R
Job Description • Lead the architecture and IC implementation of high-performance RF, frequency synthesis, data conversion, and signal processing circuits for xx’s next-generation products. • Lead the development of new circuit topologies and design techniques. • Work with Communication Systems and RF Systems engineers to translate system level specifications to block level specifications, and use deep knowledge of state-of-the-art circuit techniques to optimize the system architecture. • Work with ASIC and physical design engineers to integrate and verify the design at top level. • Take designs from product definition through tapeout, characterization, and release to high-volume production with high yields and robust performance.作者: ranica 時間: 2011-9-8 10:59 AM
职位要求:8 E) C+ r- h: v8 }3 @7 T: U7 F; p- H
Required Skills Experience and Skills Needed: / I4 i2 T# @) e I9 {8 K " ?' J0 Z; e) `# G# n; e• Must have a strong academic background with 7+ years industry experience in at least one of the following areas: o Analog/Mixed-Signal: data converters, filters, analog building blocks o PLLs and frequency synthesis: integer-N and fractional-N PLLs, DLLs, crystal oscillators o RF: LNAs, mixers, filters, PAs, and microwave circuits & Y0 w8 r' E* J6 }
• Must have IC tapeout and productization experience, and should have hands-on experience leading the test and debug efforts for products. . C# u5 g1 ~+ k! y( a$ Y• Should have familiarity with wireless or wire-line communication standards and how high-level requirements translate to block-level specifications. ' V2 `! o* P5 h7 G( D) w1 Q$ f' w• Must have experience with industry-standard simulation and design tools, such as Spectre, Spectre RF, Virtuoso, and Matlab. Education/Training Needed: - a m8 W+ y/ k. Q7 E/ ]. v• Master of Science (w/ research thesis) or Ph.D. in Electrical Engineering. / l/ }/ O; f# \8 z+ {$ q
• 7+ years industry experience.作者: ranica 時間: 2011-9-22 03:25 PM
招聘公司:A world leading analog&mixed-signal IC company : Y; W3 J) o1 J- t1 n招聘岗位:Analog Design Engineer4 l$ h+ u+ z2 q, n: x1 \
工作地点:Shanghai # p& b, K( x. F1 |- K 1 R$ G! ~1 q2 ~9 C) M1 n) F5 K6 B岗位描述: 0 U) \ i3 n; s3 `* ?# JJob Responsibilities · Research, definition, design, simulation, layout supervision, characterization and release to production of high-performance state of the art BICMOS, video integrated circuits. The integrated circuits will typically include the following blocks: · Video Amplifiers · DC-to-DC converters, LDOs, PORs · Interface Circuits –SPI, I2C, LVDS, … · Bandgaps and references · Voltage monitors · Analog-to-digital and digital-to-analog converters " i9 ]7 _1 ~5 v! I 6 k" Z: I' b, \职位要求: ; M! V1 U8 |' q0 X% A2 }) J! vJob requirements · MSEE degree, with at least 3+ years of design experience. · Hands-on design experience with BiCMOS/CMOS mixed-voltage custom circuit designs · Must possess strong intuitive and analytical understanding of transistor-level design and simulation · Must understand placement and layout issues with respect to mixed-signal IC’s · Must be familiar with Cadence mixed signal design flow. · Good English communication skill作者: ranica 時間: 2011-9-30 11:42 AM
招聘公司:A famous IC company! k* c/ }1 G8 v% J# X. l+ r* @
招聘岗位:Senior Analog/Mixed Signal Design Engineer7 @! {) G( S. C' W9 x
工作地点:Shanghai3 A l9 M O: d; g+ Q6 @
" i8 e! o2 t! I7 r5 t
岗位描述: 2 o# b/ h5 }* {9 aJob Descriptions: 1. High speed interface circuit design (DDR, USB, SATA, etc.) and fundamental components ((a) PLL, DLL, ring/RC OSC, POR (b) SAR/pipeline/sigma-delta ADC, DAC (c) REG, LDO, LVD) 2. Be responsible for the schematic design and simulation 3. Instruct the layout designer to design the circuit layout4 F* r2 ?4 T, k; p2 w( J, r
9 {/ z3 {- V, B: \6 c/ o/ L职位要求: 4 P. K- q, t* f/ iJob Qualification 1. M.S. in Electrical engineering or equivalent is required 2. 2 or more years of analog circuit design experience 3. Experience of Spice simulation and mixed-signal simulation. 4. Strong physical layout knowledge and parasitic component understanding essential 5. Experience of high speed interface & fundamental circuit design is preferred 6. Process and device physics knowledge is preferred.作者: ranica 時間: 2011-9-30 11:44 AM
招聘公司:A famous EMS company. z$ w. |$ C$ l: T# H/ c
招聘岗位:Product Quality Engineer/ S: E- n. S/ M
工作地点:Shanghai. g4 c8 y$ \, {0 N* ?7 ~
5 E# j" J$ x6 s: X1 ?- b# D岗位描述: , U/ Z! u) H" v: K1 |SUMMARY The successful candidate is a person who will lead by example a group of technical people that form the product development, product validation, manufacturing launch and mass production of various products. This person will also be successful in leading people who report to others. Key attributes of this person are – strong work ethic, attention to details, assessment of risk, absolute focus on Customer Satisfaction and product liability. ESSENTIAL DUTIES AND RESPONSIBILITIES include the following. Other duties may be assigned. - z# C8 {' w- S' ~* r% m7 G' @ 3 M0 P# r# U: V: x M, _& }! {DEVELOPMENT PHASE ) _: t1 w$ I% o5 M• Execute audits of design projects for compliance to the Product Creation Process " I. D" H# K, o. K
• Ensure that product / project risk is being identified and managed, escalate when it is not + Y, p" K. M; _) g# Z• Facilitate milestone check list % ~7 d5 w# V3 a" m( {0 F4 L• Facilitate the creation of the “Project Quality Plan” from the input of the engineering team 3 ?2 s4 ] {/ B% N) R+ W
• Manage DFMEAs • Identify, correct and escalate issues that may increase product level RISK to Company. This includes product Safety, Product Quality and Reliability, and Customer Satisfaction MANUFACTURING PHASE作者: ranica 時間: 2011-9-30 11:44 AM
• Assist in the manufacturing launch and train key workcell personnel . b) U0 R" X5 T( F, w+ u) _) _• Review other key metrics – supplier issues, manufacturing yields and fall-out, component failures, On-going Reliability test results, field failures and customer complaints to assess and quantify the RISK 5 d. ~/ O7 i V, u; {
• Continually identify and reduce the RISK # y7 z* `) a( @$ T5 c" O
• Be the conduit for sustaining engineering requests KEY ATTRIBUTTES # ]4 Q8 K& N$ w; N( f! T• Self motivated 5 }3 x+ Z3 I: k0 D$ p0 o/ r
• Work independently ' M$ O2 W0 B$ h( h
• Focus on Customer Satisfaction " b7 R( i$ O: L2 g. ]' q' [( b) `1 L • Attention to Details 0 }% M, H" `" R! h* y4 S' M- R8 [6 q2 M& Z9 y) o$ E, x" g0 r
职位要求: : |: \9 d. ?2 h" x" p* [0 p, F( uMINIMUM REQUIREMENTS • BS in Engineering • Quality Certification • Expertise in DOE, SPC, xFMEA, gage R&R, Project Audits, 8D, and other ASQ and 6-sigma principles • Understand and use Agile and SAP LANGUAGE SKILLS Ability to read, analyze, and interpret general business periodicals, professional journals, technical procedures, or governmental regulations. Ability to write reports, business correspondence, and procedure manuals. Ability to effectively present information and respond to questions from groups of managers, clients, customers, and the general public.作者: ranica 時間: 2011-9-30 11:45 AM
招聘公司:A famous IC company 3 p# F& i0 L5 F6 R; O招聘岗位:Application Engineer4 R, j9 H% B% C2 H
工作地点:Beijing ! e% T* r" l7 A5 F0 V9 U( Z3 N, v9 [3 _
岗位描述: 8 ], ]% W8 V: w0 v2 iResponsibilities: Providing technical support to customers of **** Design Solutions in Singapore(Malaysia)which include: - Providing Silicon Integrity consultation and implementing tape-out signoff for customers'projects. - Providing technical support and presentation in the pre-sale engagement - Providing post-sale flow setup and customer training Driving project-based flow support initiative including customer communications,requirements definition and schedule planning as well as project management and execution. Interacting cross-functionally with worldwide **** teams including sales, R&D and production 4 p& o6 b0 l$ A5 b8 g8 Z% v4 S. c8 e- f8 H/ \, y# R& ~/ N+ A
职位要求: $ n. T& i$ k) O0 r5 m' kQualifications: Knowledge in VLSI designs and electronic circuits Experience in back-end place and route design flow. Experience or having some knowledge in front-end RTL coding Experience in using EDA tools in some of the following areas: - LEF, DEF, GDSII - Liberty, Static Timing Analysis - Parasitic Extraction, SPEF/DSPF - Spice simulation Computer programming skills using Perl or TCL. Good communication and problem solving skills. Team oriented with a desire to learn. Able to work independently at various levels of sophistication M.S.E.E. or above. Must have at least 3-year related working experience Competitive salary作者: ranica 時間: 2011-10-12 10:37 AM
招聘公司:A famous EMS company 3 T7 u0 G5 K) x7 q! y$ w招聘岗位:DAE Lead Engineer! Z7 e/ [8 {# O& B9 G- z
工作地点:Shanghai * { N# t' b9 j2 d& d, y- E% Y* }3 t6 D& B
岗位描述:% Y3 B+ y' a' H) U5 W
SUMMARY Take the major responsibility for analyzing the technical specifications and system electrical requirements to determine the best approach and feasibility of accomplishment within time, resource, and cost constraints for Server and Storage projects from an EMI, SI, safety, and electrical routing design perspective. Provide necessary inputs to general electrical designers for design quality assurance. Drive innovation and continuous improvement within the company by harnessing new technologies and methodologies. Provide exceptional support to external and internal customers, team members, and other persons through technical project cooperation. ESSENTIAL DUTIES AND RESPONSIBILITIES include, but are not limited to the following:作者: ranica 時間: 2011-10-12 10:38 AM
Recruit and interview engineering staff. ; j# `+ [& ^! F+ v3 m [' IAssist in identifying individual and team strengths and development needs on an ongoing basis in support of management of the DAE team. R+ A0 G X* w. ^2 F* K2 f) ePropose ideas for training curriculum in area of responsibility for junior engineers. ; ^5 ^% a+ `# PCoach and mentor junior team members to deliver excellence to every internal and external customer.8 q# @: x- w7 |9 w7 [: v2 Z, H
Support strong exchange of ideas and information with the customer, within the department, between departments, and between global sites. 7 |+ s8 {# H0 c
Organize verbal and written ideas clearly and use an appropriate business style. # L0 V3 Q+ ~) KAsk questions; encourage input and feedback from team members. 0 I- H# ?, x+ X3 ^# c8 j% ~Responsible for the overall Signal integrity design and quality assurance. ' M: O. f. v4 y/ u: W; ~
Lead the system level’s signal integrity & timing analysis and consultant training to the team staffs. 9 Y$ P) Y1 Y3 t8 @+ k0 U. r( fLead and correlate SI simulations with SPIT measurements to validate the modeling methodology. 5 M j1 `/ g9 p' B ^( F
Lead EMC/EMI/safety design and analysis for design projects. ' B" q# J' l4 R0 f# S" N. }
Make the optimized design trade-offs and evaluation of mechanical, electrical, and thermal performance of both components level and system level作者: ranica 時間: 2011-10-12 10:39 AM
Assure that procedures and work instructions are efficient and not redundant. $ q1 p1 a$ o8 d8 b; B3 @) i' NDemonstrate a commitment to customer service; anticipate, meet and exceed expectations by solving problems quickly and effectively; making customer issues a priority. Solve practical problems and deal with a variety of situations where only limited standardization exists. ( J, F' W1 t, p$ p) M8 N+ J
Ability to work effectively under pressure with constantly changing priorities and deadlines. * l) l4 _7 P0 K( X- \+ v- z
Perform independent research and engineering studies . k3 a( |6 [+ G5 n9 n8 h
Comply and follow all procedures within the company security policy. ! K$ ~# r1 B) I2 ^
Adhere to all safety and health rules and regulations associated with this position and as directed by supervisor. ! O" I) k& i q5 K- \- l) @# f* N
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职位要求:# L8 \5 j* j2 @( g! U5 Q. w
Person Background: Bachelor or Master of Science in Electrical Engineering, Systems Engineering, Computer Engineering or Computer Science (MS preferred) 10 years computing related system design experience and 7+ years experience in Server or Storage system design will be required. Excellent computing, storage architecture and related design experience. Full understanding of system design process and whole life cycle of product. Experience on high-speed circuit design, multi-board, high-speed series difference pair topology simulation and eye-diagram analysis. Proficient with board level’s reflection, x-talk, ground bounce, bypassing techniques for power/ground noise reduction, termination techniques for reflection noise control. Proficient with PCB cross-section design and trade-off, SERDES channel analysis and PCB stack-up calculation Proficient with CAD tools such as SpectreQuest, Hspice and ANSOFT Designer is a plus. 5 h4 Y5 k N- Z( Q( w5 ]7 m1 l7 h$ N; |; v: T
Proficient lab experience in testing and characterization with tools such as TDR, Logic analyzer, spectrum analyzer, oscilloscopes, skew/phase noise measurements and good lab debug skills is a plus. Familiar with PCIE gen1/2/3, DDR 1/2/3/4, Infiniband, QPI, SAS, FC and USB signaling for scope analysis and high speed bus timing and integrity analysis and simulation. Strong EMC/EMI/Safety design knowledge. Excellent communication skills and sense of urgency in multinational and multisite working environment. Self-motivated and capable of working with a minimum of supervision in a dynamic team environment.作者: ranica 時間: 2011-10-12 10:39 AM
Proficiency Level Written and Verbal English Skills LANGUAGE SKILLS Ability to read, analyze, interpret and communicate regarding common scientific and/or technical journals, financial reports, and legal documents. Ability to respond to common inquiries or complaints from customers, regulatory agencies, or members of the business community. + u; g* ~: z7 m6 `, o2 w- Q & C, i. J" W% R7 a0 P9 QAbility to effectively present information to management, customers, and supporting teams. Advanced PC skills, including training and knowledge of company’s software packages. MATHEMATICAL SKILLS Ability to work with mathematical concepts such as probability and statistical inference, and fundamentals of plane and solid geometry and trigonometry. Ability to apply concepts such as fractions, percentages, ratios, and proportions to practical situations. 9 q j8 T9 x: q" D2 U. W* B" v
o/ v% m9 G! T+ M# j# c' rREASONING ABILITY Ability to define problems, collect data, establish facts, and draw valid conclusions. Ability to interpret an extensive variety of technical instructions in mathematical or diagram form and deal with several abstract and concrete variables. Ability develop mathematical models of physical reality and solve them, then implement the results. & I# y( B6 e: O3 a! P @ 5 l9 \5 w; o9 r( R6 _; [; {1 IPHYSICAL DEMANDS The physical demands described here are representative of those that must be met by an employee to successfully perform the essential functions of this job. The employee is frequently required to walk and occasionally lift and carry PC’s/test equipment weighing up to 50lbs. Specific vision abilities required by this job include close vision and use of computer monitor screens a great deal of time. . M' u9 P; b& A9 \1 G* M
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WORK ENVIRONMENT The work environment characteristics described here are representative of those an employee encounters while performing the essential functions of this job. Individual’s primary workstation is located in the office area, with some time spent each day on the manufacturing floor. The noise level in this environment ranges from low to moderate.作者: ranica 時間: 2011-10-25 04:17 PM
招聘公司:A famous IC company / w# s3 c; y1 w7 Q2 ^* }* {8 Y; \5 `招聘岗位:Smart Phone System Architect * s' B! v; u: k0 ?3 E7 Q5 H% M工作地点:Beijing , t4 } O8 C! G, `1 _8 Y5 x% E4 X, l
岗位描述: 8 J) `( m! V2 l% pJob Description Applicants should expect to become responsible for the top-level system design meeting product requirements. We ensure that all parts of the platform are designed to operate together. This includes areas such as: security and boot, trace and debug, data communication, multimedia, cellular, power saving, energy and system management, and frequency management. You will work in a team with highly skilled engineers that together carry out the system design of the entire platform. You will be working with architecture choices and system design for platform services. The focus will be on how different domains interact to deliver complete functional use cases. 1. The job involves analysis and break down of requirements, developing architecture specifications, partitioning into modules, definition of interfaces (software-hardware abstraction layer), as well as core system investigations. 2. The work will be carried out in system projects that support the main platform programs. 3. The job also includes close interaction with customers including system architecture presentations.作者: ranica 時間: 2011-10-25 04:17 PM
职位要求: : l( _0 Z) ~; {( L, }, R% e7 FJob Qualification Qualification (formal education needed): M.Sc. in Electrical Engineering/Computer Science or equivalent Requested competence: 1. A broad general technical knowledge within areas relevant to mobile communication platforms, with a special focus on one or more platform services such as security, boot, trace, debug, data communication, power saving, energy and frequency management. 2. Experience and understanding of embedded systems with respect to SoC and SW implementation and performance aspects 3. You will have extensive system design experience and have the capability to solve the whole problem rather than focussing on one detailed aspect 4. Experience of leading as well as executing technical project work as a member of a small team 5. Good communication skills 6. Quality documentation & status reporting 7. The ability to manage workload to deliver results on time作者: ranica 時間: 2011-10-25 04:18 PM
招聘公司:A Fabless IC design Company; F1 V! G% ~& p
招聘岗位:RF IC Design Engineer # s4 ~4 y# V% A9 A2 e工作地点:Suzhou. T) G5 d- \9 S' Y9 l5 G) v$ K
- X' e8 w( e: G# e2 L6 _岗位描述:+ m. A3 q y" h* {2 ^1 b, a
职位描述: 1、参与设计基于CMOS工艺的无线接收、发射系统,实现一个或多个射频模块如LNA, Mixer, VGA, PA等。 2、进行后端版图开发,参数提取并后仿验证。 3、使用实验室测试设备对工程样片进行特性评价、系统调试。 6 q( y. Z- w' Z) R; [0 U) D! _& J* i! b2 B4 O v! s2 N# g) y- K
职位要求: & A: ?' A& i* m5 f! j5 N) s; N任职要求: 1、微电子、电子工程、通信等电子类相关专业,硕士或本科三年以上RF设计工作经验。 2、深入理解射频通信电路各种模块工作原理及性能指标,熟练掌握高频电子电路设计,如LNA、 Mixer、VGA、VCO、PLL中的一种电路等。 3、熟悉RF设计中的仿真、版图设计必需的EDA工具如ADS,Cadence。 4、良好的英文读、写能力。 5、具有良好人际沟通能力、主动性及团队合作精神。作者: ranica 時間: 2011-11-2 01:49 PM
招聘公司:A famous European IC company + R$ }0 J. M1 S招聘岗位:Senior Design Engineer Integrated Circuits & Systems$ `* p- Z) Q9 u) A) x
工作地点:Shanghai 4 N' q9 V+ v- i' ^8 n4 }4 o9 M) }4 U& z6 s' _" {
岗位描述: ; F2 y6 k! s$ N0 WRoles and responsibilities - feasibility studies of circuits and systems (incl. HW design) - support product proposal and definition - analog IP and subsystem design and verification - top-/systemlevel verification - IC evaluation/debugging - test proposal and support transfer to production - plan and track project activities - coach junior engineers/ Z& G( d+ [0 k3 L! t/ D$ d
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职位要求: & c) ~7 s6 g' T$ r) Z8 rRequirements - master degree in microelectronic circuits or systems - > 5ys experience in Automotive Smart Power Design - good understanding of ASIC analog and mixed signal flow (Cadence based) - strong background in analog smart power design - experience in toplevel integration/verification - hands-on experience in silicon evaluation and debugging - very good communication skills - foreign languages: English, German (not a must)作者: ranica 時間: 2011-11-2 01:50 PM
招聘公司:A famous European IC company- f% j z8 Z5 s" T$ g
招聘岗位:Senior Specialist Integrated Circuits & Systems 9 z9 t9 J6 {, T3 l, Q1 R) M工作地点:Shanghai5 D" j% Q# t6 A0 O/ ^! E) p
4 o+ f3 @9 T& k/ q2 ?& B( `7 X岗位描述:) E. {6 U) J0 r$ o8 |
Roles and responsibilities - define system partitioning of s/c circuits and system - define HW/SW co-partitioning - provide technical feasibilities based on system simulation and/or FPGA based demonstrator - propose new technical solutions on s/c and system level - develop digital part of mixed signal ASICs - coach junior engineers : B; s3 | `4 q% L& Y1 |7 _, y% D+ }' n( _/ w4 V, T
职位要求: # w- j) a% N3 r& dRequirements - master degree in microelectronic circuits or systems - > 5ys experience in Automotive Smart Power Design - good understanding of ASIC mixed signal flow (Cadence based) - strong background in HDL coding, verification and toplevel integration - good understanding of communication interfaces used in Automotive (CAN, LIN, Flexray, SPI) - experience in FPGA development - very good communication skills - foreign languages: English, German (not a must)作者: ranica 時間: 2011-11-4 05:33 PM
招聘公司:A famous IC company% ^# D" A' a! F* p, C/ t& x9 ?5 p% o0 P
招聘岗位:Staff PDE (Process Dev. Engineering) Engineer) M% n W( h. S! b4 {
工作地点:Suzhou ' d6 g# ?; {6 @& ]0 _0 X3 h6 z% R8 M8 Y9 `& ~. u
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Qualifications Experienced years : Longer than 15 years preferred in wire bond process with longer than 10 years preferred in die attach process Experienced areas : Solder die attach (soft solder die attach, paste solder die attach, epoxy die attach), Reflow soldering and cleaning, Heavy Al wire bond (5-20 mils wire) , Au wire bond, Cu wire bond Experienced jobs : Leadframe design guideline, Understanding of materials (Leadframe, Solder, Flux, DBC, Wire), Understanding of relation between manufacturability and reliability by POR (Process of record) and BOM (Bill of material), Equipment set-up/maintenance, process/equipment/material troubleshooting and control, purchase spec/selection guideline and qualification for equipment and material Experienced packages : Power discrete (like TO220, D-Pak, QFN) and Power module packages (like SPM, IPM, IGBT/Diode module) Nationality : Local Chinese is preferred Education: 4yrs college or university preferred . Skills: Communication skills, Fluent with written English and speaking. Min level 4 and recommended 6. Other characteristics such as personal characteristics : Self motivated, independent, open mind to communicate, be willing to take risk * y, G& @: u; l4 ]/ u+ L: F8 u& b+ Z
岗位描述: . _1 m2 T( U: C0 A3 t# e ~Job Purpose To get higher quality level of NPI, to get robust PKG NPI based on DFM (Design For Manufacturing) and to support any production related issues, high skilled and experienced FOL (Front of Line) related engineer with minimum 15years in the industry are needed with high skill of FOL related process machines and its understanding, technology, handling and maintenance knowledge.作者: ranica 時間: 2011-11-4 05:33 PM
Duties and Responsibilities ) q& f6 ^0 ]0 ~& q+ t6 i
1. Responsible for PKG NPI Process Set-up (including cost reduction, new material development and new process development) in the area of Solder die attach (soft solder die attach, paste solder die attach, epoxy die attach), Reflow soldering and cleaning, Heavy Al wire bond (5-20 mils wire) , Au wire bond and Cu wire bond. " c& \ U. J1 I8 p- `# q& G' Q
2. Responsible for process characterization and improve process capability based on 6sigma process capability. * U @1 u3 \+ o6 ?$ W: D, R3. Responsible for co-work and hands over to process engineering on process set-up results according to APQP procedure based 6sigma process capability. * P1 `# n6 ?2 {
4. Responsible new process equipment selection and evaluation to communicate with equipment engineering with right comparison of COO 7 B- p: h% R9 U5 v" J$ ^5. Benchmarking one new process and new Process Development that does not exist and outside design Rule by Co-work with Dev. Engineer and process engineers , k* }1 w6 R; u7 m. s$ j2 l
6. Conduct PA work following Advanced Product Qualification Plan (APQP) Spec, FSC-QAR-0013. * r, [" f" j- V$ _4 \8 ]7. Responsible for deliberative package development, Major Tool Change (Mold die etc) to improve quality and In-sourcing project that is new 0 p g2 p- v4 G( g- |$ \# m8. Holding technical leadership for process development working with project members such like Industrial Engineering, SCM, Purchasing, Process Engineering, QA, Program management, Human resource, Facility, and manufacturing. . ^6 }9 y+ i; V0 ?* g+ ]( n9. Study and understand customer requirements, application, EHS and design those things to the process development. 2 u8 T* Y5 d/ q7 O8 I5 _+ z l
10. Supporting development engineers to generate and create documents deliverables such as control plan, process FMEA, LAR plan, project charter, Quality function development, project schedule, line certification plan, to identify process development cost, etc. 4 h6 h/ |0 \2 w6 v% S3 X
11. To plan and execute process optimization, failure analysis, process characterization, samples build for the development. # N7 f, w- Q/ U L- F D
12. To lead project team members related with process development. % c0 L- c9 _: R1 f g8 X
13. To find technical and systematic solution for failures of reliability, quality, manufacturability, cost, and cycle time that are related with process. 14. Track team member performance and report to origination manager 9 f* X) E9 L" y; g# O* `* ^
15. To share and update project progress, risk of delay, constraints, weekly at designated day with stakeholders, project team, sponsors.作者: ranica 時間: 2011-11-8 02:26 PM
招聘公司:A famous IC company 0 ~; ?+ {9 p* P招聘岗位:Staff PDE (Process Dev. Engineering) Engineer" `6 f, o( t7 I( k: H$ i2 C" d
工作地点:Suzhou& Q6 J* H4 J& P% C: u, {
1 _6 r A! K( E+ p, C+ N职位要求: / [; Y' X. @+ O6 E' n% L7 w* \Qualifications Experienced years : Longer than 15 years preferred in wire bond process with longer than 10 years preferred in die attach process Experienced areas : Solder die attach (soft solder die attach, paste solder die attach, epoxy die attach), Reflow soldering and cleaning, Heavy Al wire bond (5-20 mils wire) , Au wire bond, Cu wire bond Experienced jobs : Leadframe design guideline, Understanding of materials (Leadframe, Solder, Flux, DBC, Wire), Understanding of relation between manufacturability and reliability by POR (Process of record) and BOM (Bill of material), Equipment set-up/maintenance, process/equipment/material troubleshooting and control, purchase spec/selection guideline and qualification for equipment and material Experienced packages : Power discrete (like TO220, D-Pak, QFN) and Power module packages (like SPM, IPM, IGBT/Diode module) Nationality : Local Chinese is preferred Education: 4yrs college or university preferred . Skills: Communication skills, Fluent with written English and speaking. Min level 4 and recommended 6. Other characteristics such as personal characteristics : Self motivated, independent, open mind to communicate, be willing to take risk 6 \1 E: r, O' G, w8 ~$ s1 K; x. Y. P; _) k% c `
岗位描述:. f' x A7 b. R: F8 v1 n+ w
Job Purpose To get higher quality level of NPI, to get robust PKG NPI based on DFM (Design For Manufacturing) and to support any production related issues, high skilled and experienced FOL (Front of Line) related engineer with minimum 15years in the industry are needed with high skill of FOL related process machines and its understanding, technology, handling and maintenance knowledge.作者: ranica 時間: 2011-11-8 02:26 PM
Duties and Responsibilities ) a9 ]4 s% e3 k0 g
4 W9 n! O3 J |9 a' k( c ~1. Responsible for PKG NPI Process Set-up (including cost reduction, new material development and new process development) in the area of Solder die attach (soft solder die attach, paste solder die attach, epoxy die attach), Reflow soldering and cleaning, Heavy Al wire bond (5-20 mils wire) , Au wire bond and Cu wire bond. ; R s' C) ~7 `2. Responsible for process characterization and improve process capability based on 6sigma process capability. $ l$ c/ q. u3 ~) H W! d( L3. Responsible for co-work and hands over to process engineering on process set-up results according to APQP procedure based 6sigma process capability. 4 Y8 l$ o/ B& K8 O/ p/ y8 ^4 l4. Responsible new process equipment selection and evaluation to communicate with equipment engineering with right comparison of COO " V9 p% A7 o2 e) q& H" I* X5 G5. Benchmarking one new process and new Process Development that does not exist and outside design Rule by Co-work with Dev. Engineer and process engineers 6 r, v& ~/ h9 a( R1 f+ N5 S. {- u, [5 ?8 Y
6. Conduct PA work following Advanced Product Qualification Plan (APQP) Spec, FSC-QAR-0013. % m& M4 d0 U! J1 D* q# G9 n( ?7. Responsible for deliberative package development, Major Tool Change (Mold die etc) to improve quality and In-sourcing project that is new ' | [3 z8 l) s. o( b8. Holding technical leadership for process development working with project members such like Industrial Engineering, SCM, Purchasing, Process Engineering, QA, Program management, Human resource, Facility, and manufacturing. , E7 g: t/ X6 r/ M& A) V
9. Study and understand customer requirements, application, EHS and design those things to the process development. 1 ?! f( Z) g. T" z+ d( C6 q6 R10. Supporting development engineers to generate and create documents deliverables such as control plan, process FMEA, LAR plan, project charter, Quality function development, project schedule, line certification plan, to identify process development cost, etc. - u) U2 [ g/ k% T S' x* L
11. To plan and execute process optimization, failure analysis, process characterization, samples build for the development. & r+ }+ C! l$ q/ k& n, Y4 M( Z12. To lead project team members related with process development. 3 U1 G4 u" M3 \# P t8 Z13. To find technical and systematic solution for failures of reliability, quality, manufacturability, cost, and cycle time that are related with process. 14. Track team member performance and report to origination manager 3 P% d" G$ O' }: c+ R
15. To share and update project progress, risk of delay, constraints, weekly at designated day with stakeholders, project team, sponsors.作者: ranica 時間: 2011-11-23 04:57 PM
招聘公司:A famous IC company ' g- K A+ S# X' C# v/ o3 K招聘岗位:Sr. Staff engineer, Analog/mixed signal IC design (wireless team) & C1 Z, x4 J, s u工作地点:Shanghai+ i, E2 P8 H5 T }1 f
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岗位描述: 4 E! X7 t+ n) \Job Description: Our mixed-signal team develops cutting edge technology for the wireless product line. We are actively seeking talented analog design engineers who want to join a dynamic and experienced team and take their technical knowledge to the next level. This job involves working closely with US team in developing and eventually supporting the production of next generation sub-micron mixed-signal blocks.作者: ranica 時間: 2011-11-23 04:57 PM
Responsibilities: - Technical lead of the wireless team in China designing analog blocks such as PLL, ADC, DAC, Filter, Regulator, SERDES - Corner Simulations (Cadence, Spectre, Ocean, Monte Carlo, ADS) - Layout design - Block/chip level verification (LVS, DRC, LPE) - Design review - Chip level integration - Test, characterization, debug - Close work with US team including occasional travel - Helping other team members with their design/schedule2 \: n+ |- t; o2 ?4 B5 l
0 V" H' m8 Y) Y, _$ ]职位要求:2 c8 C- I: v! s
Job Requirements (education and experience): - MSEE with at least 10 years of industry experience - Previous leadership experience is a plus - Deep understanding of fundamental analog techniques - Experience with low-power analog design in deep submicron CMOS - Experience in Cadence Spectre, SpectreRF, AMS and Virtuoso - Hands-on experience in analog layout design and verification - Knowledge of Skill, Matlab & verilog programming - Experience with high volume IC manufacturing is a plus - Hands-on experience with lab equipment - Occasional travel to US for technical training/design review/product test作者: ranica 時間: 2011-11-25 01:33 PM
招聘公司:A famous IC company! G/ A# K6 |+ O7 q+ S! N2 ?+ v
招聘岗位:Senior mixed signal verification designer 5 P8 l! e2 c z* M; W' j" ^工作地点:Shanghai, e% D6 Q4 {: y+ H3 @# \8 b
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岗位描述: 4 \/ y+ }6 E- L- n4 e4 `8 dDescription of Function & Responsibility 1) Design digital behavior model for SOC analog IP, such as transceiver, PLL, high speed SERDES, etc. 2) Build simulation environment to verify digital behavior model. 3) Build mixed signal simulation environment to do Verilog-Spice verification. Check mixed signal simulation results with behavior simulation results to correct model. 4) Extract analog IP timing information and verify.% {1 Q# @. A+ R
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职位要求:; S n3 m& P; E0 V
Education: MS or above in Electrical / Electronic Engineering. Experience: Master with 4+ experience with emphasis in mixed-signal, digital integrated circuit design. Familiar with Verilog coding, digital verification, mixed signal verification and the use of various design CAD tools such as VCS, NC-Verilog, HSPICE, Spectre, etc. Familiar with SOC chips, knowledge of memory, PLL, ADC, DAC is preferred.作者: ranica 時間: 2011-11-25 01:40 PM
招聘公司:A famous IC company 2 t6 k6 @* Y4 X {" Z% G) B, x$ O b招聘岗位:Senior System SW Engineer! }( B' s H. K& T1 ^
工作地点:Beijing& {4 O5 O0 z' ]/ V; i. b' }
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Job Description: 1. Involved in multi-mode protocol stack(GSM/GPRS/EDGE/TD-SCDMA/TDD-LTE) requirement analysis, design and tracking 2. Involved in multi-mode protocol stack(GSM/GPRS/EDGE/TD-SCDMA/TDD-LTE) architecture design and interface design 3. Follow 3GPP/CCSA standard evolution; 4. Modem platform software requirement analysis and architecture design; 5. Modem platform software trouble shooting and performance optimization; 6. TD-SCDMA Dual SIM Dual Standby platform requirement analysis and architecture design; 7.Cooperate and communicate with technical design teams to achieve modem platform software development; ; j2 ?" P8 h3 b) W3 j) X/ c
5 o% u% c1 J) a5 D+ d职位要求:* q2 {, m8 D+ v$ u8 {- D9 N
Job Qualification 1. Master or above of Telecommunication, electronic engineering, Computer Science or Automation relevant field; 2. Familiar with wireless communication technology (LTE/TD-SCDMA/WCDMA/GSM/EDGE); 3. Experienced with embedded software programming C, C++. Familiar with Multitasking RTOS environment; 4. Familiar with ARM development tools and debug methods. 5. Strong proficiency in mobile phone platform architecture design. Have knowledge of some mobile phone components(RAM/FLASH/LCD/Keyboard/Power/USB/UART/SPI/IIC/GPIO……); 6. Prefer experience of mobile phone platform architecture design or driver development; 7. Excellent communication and organization skills; 8. Good ability in English for technical reading and writing, fluent in English communication;作者: ranica 時間: 2011-11-29 01:22 PM
招聘公司:A famous IC company; {1 V. C( b. d9 ^
招聘岗位:Sr. Staff engineer, Analog/mixed signal IC design (wireless team)3 ?9 J$ O. B$ {, I
工作地点:Shanghai, P8 _9 S& g" q7 j" \6 {
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岗位描述:! j- o! U$ ^% K
Job Description: Our mixed-signal team develops cutting edge technology for the wireless product line. We are actively seeking talented analog design engineers who want to join a dynamic and experienced team and take their technical knowledge to the next level. This job involves working closely with US team in developing and eventually supporting the production of next generation sub-micron mixed-signal blocks. Responsibilities: - Technical lead of the wireless team in China designing analog blocks such as PLL, ADC, DAC, Filter, Regulator, SERDES - Corner Simulations (Cadence, Spectre, Ocean, Monte Carlo, ADS) - Layout design - Block/chip level verification (LVS, DRC, LPE) - Design review - Chip level integration - Test, characterization, debug - Close work with US team including occasional travel - Helping other team members with their design/schedule/ ?# a4 Q1 Y+ M" k
9 |( f N% C X& x c9 S职位要求:6 ^# ]6 d2 x# Q/ o, k) d* ^
Job Requirements (education and experience): - MSEE with at least 10 years of industry experience - Previous leadership experience is a plus - Deep understanding of fundamental analog techniques - Experience with low-power analog design in deep submicron CMOS - Experience in Cadence Spectre, SpectreRF, AMS and Virtuoso - Hands-on experience in analog layout design and verification - Knowledge of Skill, Matlab & verilog programming - Experience with high volume IC manufacturing is a plus - Hands-on experience with lab equipment - Occasional travel to US for technical training/design review/product test作者: ranica 時間: 2011-11-29 01:23 PM
招聘公司:A famous IC company 9 x1 {9 @! M, z& u! T招聘岗位:Senior mixed signal verification designer& p8 b9 T, @$ b1 y9 X4 d
工作地点:Shanghai0 }# P6 k# E( Q+ W* t
7 o5 k* Q1 m" c0 x0 w( n8 C岗位描述: - ]7 X% V9 K) ~( i0 |! xDescription of Function & Responsibility 1) Design digital behavior model for SOC analog IP, such as transceiver, PLL, high speed SERDES, etc. 2) Build simulation environment to verify digital behavior model. 3) Build mixed signal simulation environment to do Verilog-Spice verification. Check mixed signal simulation results with behavior simulation results to correct model. 4) Extract analog IP timing information and verify. / @- P' k" f' g$ f, k% w# b+ J2 n" ]+ C9 j, ^. r
职位要求:" Q7 P4 L# N$ d: v# r
Education: MS or above in Electrical / Electronic Engineering. Experience: Master with 4+ experience with emphasis in mixed-signal, digital integrated circuit design. Familiar with Verilog coding, digital verification, mixed signal verification and the use of various design CAD tools such as VCS, NC-Verilog, HSPICE, Spectre, etc. Familiar with SOC chips, knowledge of memory, PLL, ADC, DAC is preferred.作者: ranica 時間: 2012-2-3 04:35 PM
招聘公司:A famous IC company ) b$ f' ]( X0 R招聘岗位:Senior Application Engineer- @: s2 u! _: b/ \$ B% N+ x( l
工作地点:Shenzhen' {3 Z6 v' v6 y0 @
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岗位描述: 0 \3 ]! V4 V" b2 Y d0 D" D/ vThe candidate filling this position needs to be an experienced systems/application engineer with extensive tuner/demodulator/decoder knowledge in both hardware and software areas. The main job function includes o Design and support reference designs o Manage strategic partner accounts o Work with local FAEs supporting alpha customers during early product roll-out phase. HW (RF and base-band) design/debug skills are a must while basic software programming skills including driver integration and writing ATEs for reference design testing is highly desired. The preferred applicant will have extensive knowledge of tuner/demodulator/decoder in both system and application level. Previous experience of supporting IC product into high volume shipment is a must. The ability to establish and maintain good partner relationship as well as good technical project management skills is a must Job Description: Primary responsibilities will include: - Supporting strategic partners/alpha customers by reviewing, testing and debugging reference designs. Provide HW & SW driver integration support. This requires up to 30% travel to partners/customers in China - Define design, debug, and characterize reference design EVKs - Generate application note and test report - Manage and provide technical support to multiple strategic partner accounts - Collect market and competitor information for marketing analysis - Travel to US headquarter for product support training as needed作者: ranica 時間: 2012-2-3 04:35 PM
职位要求:. |) O9 ]( d" A7 S' A6 y. y
Experience: The person for this position will need the following abilities - Strong technical account management and project management skills - Strong PCB knowledge including schematic design and layout. Hands-on skills of PCBs including prototyping and optimization board design. - Strong HW development, debugging and troubleshooting capability - Basic SW programming skills. Able to review basic C/C++ code and provide driver integration support - Customer field trial experience - Extensive knowledge of tuner/demodulator/decoder in system and application levels - Test equipment operation: Spectrum analyzers, network analyzers, signal generators - Must be able to communicate clearly and have good customer interface skills. Qualifications: - BSEE with 7 years or MSEE with 5 years in RF/Mixed signal IC systems engineering or applications engineering. - Tuner/demodulator/decoder hardware/software experience and familiarity with high volume consumer oriented RF IC’s.作者: ranica 時間: 2012-2-3 04:37 PM
招聘公司:A famous IC company- g; f. }7 O! n7 _) d0 ]) j% U+ J
招聘岗位:Software Applications Engineer - Graphics. N @" K: i; H$ U( w
工作地点:Shanghai8 a2 Q) e" V* C! ] v$ E
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岗位描述: $ V+ B3 m$ a4 E; K# n: xBackground XX’s Application Engineering Group is responsible for providing high quality technical support to customers using XX’s products. In order to do this, we have a number of Applications Engineering teams based at various locations around the world. We are now looking for someone to join a small team based in our Shanghai office. This role will encompass the provision of high quality technical support as part of a co-ordinated worldwide team. Applications Engineering role You will be required to gain a good knowledge of XX’s processor cores, GPUs, development tools/boards, and other products through close working with the worldwide application engineering teams and XX's Product Engineering group. Then to use this knowledge to provide XX's customers with the assistance they require to develop systems around the XX processor and XX GPU contained within their new products. The transfer of your knowledge will take a number of forms. Firstly, you will need to be able to provide comprehensive responses to customer enquiries. Such enquiries may be received by email, telephone or face to face meetings. Secondly you will be required to provide in-depth technical training to XX's customers. You will therefore be expected to be able to travel every six to eight weeks. You will also be expected to have excellent interpersonal skills and be a good presenter. Thirdly you will be responsible for the generation and review of new product documentation, such as application notes, frequently asked question lists and user guides. This may include translation for local language support. Finally, you must be reactive to the demands of both customers and sales and feedback requirements to XX’s Engineering and Marketing groups.作者: ranica 時間: 2012-2-3 04:37 PM
职位要求: 0 i2 l6 H: V# |/ U, H6 L0 D( nPerson Specification Qualifications Good university degree, in Computer Science or Electronics Engineering ideally, although other science graduates would be considered if they have relevant experience. Experience · Minimum of 3 years industrial experience · Strong C/C++ coding and debug skills – preferably using GCC, XX’s compilation tools, or MS Visual C++ · Experience of developing with 3D and/or 2D graphics APIs, ideally OpenGL ES/desktop Open GL/Direct3D and/or OpenVG · A good understanding of the interaction between software and hardware · Experience of microcontrollers/microprocessors · Experience of interacting with colleagues outside of China Desirable · Professional experience of customer and sales interaction – ideally in a Technical Support role - as well as development work · Knowledge of XX processor architectures · Knowledge in GPGPU, ideally OpenCL · Device driver development experience, ideally in Linux/Android · Development experience in windowing systems, for example X11 in Linux · SoC design experience, including development of synthesizable Verilog/VHDL modules Personal Requirements · Must have excellent written and verbal communication skills with both colleagues and customers, including good written and spoken English · Must be proactive in obtaining engineering or management input, in order to complete project and internal tasks in a timely and accurate manner · Must have the desire and ability to solve problems quickly · Must be enthusiastic and well driven · Must be able to schedule own workload and plan tasks – based on both internal and customer requirements. · Must have good inter-personal skills, and be able to work well within a team; especially when under pressure · Must be willing to be flexible and accept new challenges · Must be able to travel on a regular basis, both to give customer training作者: globe0968 時間: 2012-2-17 12:18 PM
招聘公司:Access network products company$ m! Q0 i8 s4 T7 j
招聘岗位:方案经理- t+ t9 z- p) ]- H- R+ ^5 o/ d
工作地点:Shanghai) ^0 [/ S! d% Y+ I1 T5 ?
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岗位描述:5 t" j7 n( g9 H
1、针对有线电视运营商(MSO或有Cable网络运营商)规划解决方案,含战略/业务规划、需求管理、路标制定、架构设计等,能够抓住客户的转型方向、全业务转型的机会窗,提升公司解决方案和产品的商业竞争力; 2、理解广电客户对业务及集成需求点,并依此设计满足完善的技术解决方案,推动公司相关部门实现解决方案并在目标客户成功落实实施、响应及支持方案和合同项目执行中所需的客户需求和沟通交流; 3、负责面向MSO客户的融合业务解决方案规划,包含但不限于 HFC / EPON / 融合通信等领域的方案战略; 4、负责面向MSO客户的网络演讲解决方案规划,包含但不限于CATV / EPON / EOC, 综合接入,家庭网络等解决方案; _( @8 k4 ~: b: `2 W7 @1 b( g: S$ w2 O0 F; p# x5 K; u
职位要求: 4 s- `0 U U4 W2 H; m9 h1、学历:本科以上,电子、广播电视、通信、计算机等相关专业; 2、经历要求:5年广电行业经验,有实际的广电系统集成经验者优先考虑,对广电业务中常用的网作者: globe0968 時間: 2012-2-17 12:19 PM
招聘公司:Access network products company 4 R, J2 ^1 m U4 `招聘岗位:方案经理; k, t0 J& E6 T. [/ {8 z, e; j
工作地点:Shanghai6 ^: M; Q& N+ k" y6 x# \5 r
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岗位描述: 3 M, h& W+ g( ~ G4 X' F3 f1、针对有线电视运营商(MSO或有Cable网络运营商)规划解决方案,含战略/业务规划、需求管理、路标制定、架构设计等,能够抓住客户的转型方向、全业务转型的机会窗,提升公司解决方案和产品的商业竞争力; 2、理解广电客户对业务及集成需求点,并依此设计满足完善的技术解决方案,推动公司相关部门实现解决方案并在目标客户成功落实实施、响应及支持方案和合同项目执行中所需的客户需求和沟通交流; 3、负责面向MSO客户的融合业务解决方案规划,包含但不限于 HFC / EPON / 融合通信等领域的方案战略; 4、负责面向MSO客户的网络演讲解决方案规划,包含但不限于CATV / EPON / EOC, 综合接入,家庭网络等解决方案; + \& V# r# k+ d& Z i( {) N. y8 X$ Q
职位要求: 0 E0 k" d2 v6 P* P0 q/ w1、学历:本科以上,电子、广播电视、通信、计算机等相关专业; 2、经历要求:5年广电行业经验,有实际的广电系统集成经验者优先考虑,对广电业务中常用的网作者: ranica 時間: 2012-2-20 01:46 PM
招聘公司:A famous IC company! _" R2 F8 i9 E k
招聘岗位:(Senior) RF HW Design Engineer—— Mod/RD/HWI + Q: p: C9 ^' a; a) b' }& ?工作地点:Beijing : g$ p. v3 V- D/ Q9 J. m' }6 t' l3 |( ~: {
岗位描述: ; {( b# W7 Q0 ~4 s9 J4 L$ N( |Key Responsibilities: ! l j) \9 _1 x7 r! V& }$ Q1. RF sub-system design through close co-operation with Baseband to develop HW platforms for R&D SW development; - i$ W. K. n( T* |& q Z2. RF sub-system design through close co-operation with Baseband to develop effective robust reference HW modem design, which can be used for customers’ mass production; ) ~+ b+ B2 q8 K3. RF Block Diagram, Link Budget Calculations, Design specification documentation, Schematic drawing, PCB layout review, etc.; % v4 S' u8 `& H
4. Specifications of RF front end components like duplexers, filters, switches and power amplifiers in cooperation with component suppliers; 5 W) ~# M3 Y. r
5. Components evaluation, first reference design builds; $ ]3 R3 k0 _( U1 w5 A3 F" g. R/ ?
6. Test and verification of RF transmitter and receiver blocks on the reference design; 0 c6 @ b$ Q2 S$ Q# W; K7. Deliver efficient methods for production calibration and test to customer production; + a5 }% }9 e5 s% q8. RF new technical track and study; / I% ~0 {; ]+ j
9. Technical support and customer trouble shooting in RF; 10. Support Customers to develop production environment calibration and test.作者: ranica 時間: 2012-2-20 01:47 PM
职位要求:9 p* O$ l0 p4 O# E
Job Specifications: ( S! H% t) i) }6 Y D% a7 P1. BA degree or above in telecommunication, electronic engineering or microwave, etc.; ! A- Z; N# a1 B' a1 z
2. RF sub-system design and production experience within the mobile communication industry; 8 \0 A0 A! h' I8 C9 S- C 3. Ability to read and understand the 3GPP specification in general and the air interface in specific; 3 a/ ?! ?% r% L4 W- u- H6 g4. RF Knowledge in modern wireless communication and communication theory; 0 _" P' \: X3 T6 v( R
5. Circuit theory knowledge and experiences in RF and microwave; 7 s) l, k) v! W5 G2 I0 V3 b2 y/ m3 Q6. RF instruments handling such as spectrum analyzer, RF signal generator, noise analyzer, vector network analyzer, VSA, etc.; 5 o! `3 k V8 w7 d+ m* g7. Lab work skills (handling 0204 components e.g. when matching the RF parts); X8 \% h9 s f% L1 g8. Skills in Schematic drawing; 9. Fluent English in writing and speaking.作者: ranica 時間: 2012-2-20 01:52 PM
招聘公司:A famous IC company1 Y& {8 } R: Y
招聘岗位:CEO Assistant & PR Specialist + ]( M z' `) O3 |工作地点:Shanghai2 v9 ?; M' V; G- @4 q2 z
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岗位描述: 0 h+ U" b# z: Y1 eGeneral Purposes / Objectives 总的目标协助 CEO 处理日常及商务事项,负责公司与政府、行业关系工作 职责范围 CEO Secretary 1.负责总裁日程安排,协助总裁处理日常办公,商务事项 2.整理会议纪要、草拟报告文件及相关文档的建立 3.负责总裁各级文/函/电的处理,协助总裁对外各项沟通和联系工作,包括与投资方的沟通协调。 PR Specialist 1.处理与政府相关部门的联系,为公司争取相关的政策与资金支持及申报 2.处理与行业协会的关系,为公司收取相关行业动态及协会支持 $ b" l D$ l" N- p, Y6 H 1 c w& W- r% ?8 r: @+ M1 f职位要求:8 U/ B" j F; u9 Y0 _
Position Requirements 职位要求 Education 教育: 本科以上,CET-6 Experience 经验10 年以上相关工作经验;至少5 年以上半导体行业相关经验 Specific or Entrepreneurial Knowledge 特殊技能对外沟通协调能力优秀,英文听、说、读、写能力优秀作者: ranica 時間: 2012-2-29 04:04 PM
招聘公司:a fabless IC design company , ] b3 K1 q* r" R2 u& ]$ D. V9 Z招聘岗位:Junior/Senior VLSI Designer ' N3 `- M8 i( `工作地点:Shanghai! O! v5 K& C' ~/ G) t
9 T: ~$ {, r7 _+ c: X2 V) r岗位描述:3 Q7 N" H1 \4 e7 I! I' @
Responsibilities: 1. Chip level micro-architecture design for digital TV and Set-Top-Box applications. 2. RTL level design and system simulations. 3. RTL to netlist synthesis, formal verification and timing analysis. 4. JTAG boundary scan and full scan chain implementation as well as ATPG vector generation.4 N8 K' C. F7 ^$ O/ R& {& Z- H
. ? J* r; P2 J! Y) g& }职位要求:7 w) K# h+ J% E. o, X. p, N
Requirements: - BS or MS degree in EE with 3+/5+ year VLSI chip design experiences. - Skills and experiences in DTV SOC design, computer system, 2D/3D graphics, digital audio DSP processor and/or networking chip designs. - Experience in RTL simulation tools, Synopsis logic synthesis tools, Formal verification tools, timing analysis tools, and Design-For-Test schemes. - Knowledge and technical background in one or more of the following areas are necessary: Computer architecture, PCI bus, USB, ATA bus, IR, UART, SmartCard, 1394, Ethernet, DDR, SDR memory systems will be helpful - Good communication skills and self-motivation!作者: ranica 時間: 2012-2-29 04:05 PM
招聘公司:digital audio chip maker # _+ D' E8 z5 L+ u4 P0 `2 r8 d& h招聘岗位:模拟IC设计工程师. G& |; C5 K4 M3 s' d. v8 ]
工作地点:Shanghai : m8 L. ~7 \# D8 ~ C2 a8 }7 C/ }1 V8 j! r+ }. m; h- X
岗位描述: . S5 K) s6 t* @! e岗位描述: 1. 设计模拟电路或混合信号IC。 2. 使用CADENCE或MENTOR GRAPHICS设计工具进行模拟电路设计,仿真。 3. 设计版图布局,并协助版图工程师进行版图设计,确保版图达到电路设计的要求。 4. 计划实验室评估计划,并使用实验室测试设备对工程样片进行测试评估。 5. 撰写设计,测试报告,协助测试工程师进行中测和成测规范的定义和程序开发,验证。 0 N7 O1 E% Q) s3 J- C7 l
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职位要求: ; k+ z; I! _3 i; f& D职位要求: 1. 具备扎实的电子电路和晶体管的理论基础,掌握IC设计流程、方法及工具,熟悉集成电路制造过程和工艺。 2. 熟练应用Cadence设计软件进行IC设计。 3. 熟悉模拟电路的原理,设计技巧及关健参数,如参考电压源,振荡器,放大器,比较器等。 4. 具有良好的学习,分析和创新能力,良好理论与实际结合的能力,在电子电路方面有良好的悟性。 5. 具有模拟或混合信号IC成功量产经验 、硕士研究生或以上学历。作者: ranica 時間: 2012-3-1 03:59 PM
招聘公司:A communications chip company+ s1 C7 Z8 G- Q8 t. d
招聘岗位:内部审计+ Q( u% }6 `$ P# `( \* W$ C
工作地点:Shanghai + Z! A* J8 ]* c! |" V 5 @# N! B$ V: h1 ^% h5 c: Z岗位描述: 3 `0 }& s( M( [4 X* W" S- f工作目的和性质:在审计监察部经理的领导下,开展与内控管理相关的组织、协调的相关工作,负责组织对下属分、子公司的审计监查组织工作。 主要职责: 1. 对内部控制及风险管理的有效性进行评审,推动建立、健全内部控制系统。 2. 制定公司内部审计制度,负责审计项目的调查,拟订具体审计方案,出具审计计划与审计通知; 3. 编制审计工作底稿,并收集、整理和归档各种审计资料; 4. 对被审计单位财务收支及其他业务活动的真实性、合法性、合理性、效益情况进行独立的经济检查和监督; 5. 实施审计调查,控制、考核、纠正被审计单位偏离公司整体经营目标的行为; 6. 编制审计报告并就审计结果对财务及经营管理提供有效、可行的建议; 7. 开展内控审计,对公司内部控制制度的建立与执行情况进行审计; 8. 参与经营管理方面的内部控制程序和制度的制订; 9. 综合管理部/审计监察部经理安排的其他工作。 % o" b3 ?# C9 y2 o: N" H' T5 n7 q9 @; S
职位要求:( V1 k( b! u7 |3 T
任职要求: 1. 学历要求:全日制大学财务、审计类专业本科以上学历,持有CIA资质者优先考虑。 2. 工作年限:8年以上企业内部审计监察工作经验 3. 其他要求: a) 坚持原则,廉洁奉公,忠于职守; b) 有较强敏锐的洞察力、逻辑分析能力以及较强的持续学习能力,富有创新意识; c) 熟悉财会、税收等相关经济法律法规,熟悉企业内部控制与经营管理;熟悉内部审计的规范、程序,了解企业风险管理与控制; d) 优秀的文字表达能力; e) 熟悉应用各类办公软件; f) 良好的沟通与团队协作能力,良好的亲和力和应变力; g) 具有较强的自我学习能力和独立开展工作能力; h) 积极主动,能在压力下工作。作者: globe0968 時間: 2012-3-16 11:54 AM
聘公司:one famous IC company; ?' Z1 y. H* {1 \
招聘岗位:Sr. Design Engineer $ Y& d5 [% @7 V- q9 H' d& V: E$ Z工作地点:Shanghai- k" w/ c' a" x/ b! V' a: D
: S- \' J' A3 y# b4 V岗位描述: 5 S% S" P6 t! z0 `3 l-Work with analog power IC design team for new product development; -Work closely with layout designer for layout implementation -Verification of performance requirements using appropriate simulation and verification tools. -Support test & product team with chip debugging, failure analysis, characterizations and product release efforts; " Z! R' e& D! C9 L% v% d! c7 c7 z% |" R: G, g# A
职位要求:; X/ k3 H6 i" O8 m! Z" n8 A
-Master degree or above in EE or related field; -3+ years of working experience on analog power IC design area; -Familiar with details of product development: design method, design process, CAD tool, design for test, physical design, system applicant -Strong experience in power analog blocks design, including LDO, DCDC Converters, Battery Charger, WLED Driver, Power Path, Charge Pump, etc. Especially on switch mode converter designs. -Familiar with CAD tools, such as schematic capture, SPICE simulator (or equivalent transistor level circuit simulator), Virtuoso; -Understanding of BiCMOS process technologies and device physics -Excellent understanding of written English and good spoken English -Good communication skills and cooperative spirits. -Outstanding ability of self-management and attain goal under pressure.作者: tk02561 時間: 2012-3-26 03:26 PM
招聘公司:A famous IC company$ }+ y; p; n# L r1 A3 m$ |% X' R
招聘岗位:Senior / Design Engineer ( Memory) - M0 z4 M! q4 z: ?& {! ]7 j8 `工作地点:Shanghai 6 N3 ]$ s3 C# K% Q 2 F" I, x4 C' j7 ^8 H) I$ k2 q岗位描述: 0 }$ j) p# G& F# D; G9 J-Responsible for analog and logic block design in the memory products. -Responsible for the developments of non-volatile memory products and flash macros. 9 `) t9 P% B6 d. O* z
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职位要求:# G6 Y+ J; r9 ~1 m% p; d7 C
Key Competency Requirements: -Technical knowledge in IC design methodology. -Knowledge of non-volatile memory, analog design, noise analysis, low power/leakage, high-speed memory design a definite advantage. -Tools used may include HSPICE/HSIM, Cadence Design Entry, IC layout tools, or other equivalent tools. Education and Experience Required: -Education Required: MS. EE or Ph.D. EE required; -Experience Required: 3+ years memory or analog design experience; -Advantageous with experiences or exposures to the following: as project or team leader, test, package/assembly design and digital/layout design.作者: ranica 時間: 2012-4-9 02:27 PM 標題: Application Engineer - High Power Semiconductors (IGBT)[ 职位描述0 K/ t( N+ W: _, z* O
1. Application engineer on high power semiconductor devices (e.g. IGBT modules & discretes) for industrial & consumer applications. " S; ^( u1 V% i2. Technical support on power semiconductor product promotion, application & training for regional customers and distributors. + N0 O. H& z8 V0 E' H ?- U 3. Co-work with marketing & sales colleagues on project understanding & tracking.% Z: X0 Z8 k0 S3 Z6 f3 @: D
4. Domestic & occasional overseas travel required.& J% v0 R9 r% f$ w
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职位要求 0 j4 ?; T7 S( @! x& U) ]' K5 g - Good educational background with Master (preferred) or Bachelor’s degree on Electrical/Electronic Engineering (majored in Power Electronics) / x. ^8 y0 G0 X; ]' G! f - Good professional background with at least 5 years of working experience ( z8 J' s/ Y% \! ?& m# u- _; T0 t - Hardware & PCB design experience on inverters/converter power stage for AC drives, UPS and other power conversion equipment.+ C3 P" h/ k8 v/ g. K6 r
- Familiar with PCB CAD software tools (e.g. PROTEL, OrCAD, EAGLE) and skilled in making schematic diagram and PCB layout # n4 @* i, D! v2 M - Knowledge & experience with IGBT switching, gate driving, protection, cooling, power layout and system issue like EMC treatment. & x% r- s6 E8 I- Knowledge on power electronic circuits and applications like AC drives, UPS, welding, induction heating, wind/solar power generation, etc. 3 s, R C% }4 _6 V- Good language skills in Chinese and fluent in spoken & written English 5 E2 M. w* l4 P' E' f
- Strong analytical skills and self-learning/quick learning ability 9 @! V S) Z: A0 N- Y
- Good interpersonal skill and good team player ( f( y6 F3 K0 A6 [* h- Highly initiative, self-motivated and result-oriented . a& u! A2 b! a% Y$ J - Willing to be dedicated in technical job and taking it as long-term career作者: ranica 時間: 2012-4-12 10:15 AM 標題: Senior F/E SQE 客户 A famous IC company8 U- x/ n# M# @1 v$ R" X% \
地点 Shanghai . L Q- l- R) i % B: @) e' r! a& k) D/ a$ Y职位描述" v$ s3 Z+ f6 z
1. Quality interface between XX and wafer foundry & EPI vendor. $ O, M# A) H$ t6 T) J% A0 \ 2. Coordinate monthly business review meeting and hold regular quality review meeting with wafer foundry.- x( a3 {) r+ n/ e8 d5 s9 s( }% w3 w7 L
3. Work with engineering groups and wafer foundry to solve wafer quality issue.6 R# K, M u d. c& Z$ F6 w
4. Dispose wafer related nonconforming material.3 ~+ \8 H' I+ T; A$ H1 t
5. Handle failure analysis for quality issues with foundry and handle wafer RMA.( i% r) H4 {: }* g% G3 L3 v
6. Establish and maintain quality metrics to evaluate foundry quality performance. . h( f! L9 e0 } 7. Review foundry 8D/CAR and verify corrective action implementation and effectiveness.3 e. L: V& _0 g- j8 C/ B
8. Lead wafer foundry audit. ) y/ p2 v; v4 e1 k1 M( Y/ | 9. Work with internal integration team to manage foundry change control and follow up XX ECN implementation.作者: ranica 時間: 2012-4-12 10:15 AM
职位要求 & k5 m& M. a) R# V$ k Items Necessary Qualification Expectation Qualification 7 X( K [! K( b8 N" c- I Education Bachelor degree or above in engineering.6 A$ B" I3 I+ D9 e2 o2 }/ V
Experience1 W* H3 q, p- N/ U* r p
Min 3 years experience in wafer fab. Fab process or quality engineer preferred.3 T. U8 g/ w' Q( g! R& {: U
Skill ! O/ O. \# q1 u Experienced in 8D & problem solving and SPC3 l9 f; H8 C; P8 V! W
Familiar with Wafer level FA) E) i+ ]6 H) l5 W/ p8 d' P
Qualified ISO 9001 or TS 16949 auditor $ [# F- |! N. u% Y# T Competency& s8 @ C& |7 X# g% k- x5 r3 @. m
Good written and spoken English. " u R! T' \& R- \ Semiconductor manufacturing experience+ h# D7 E0 u) a2 W
Be able to work and communicate well with all levels of external manufacturing suppliers. ( v7 k( Y" K. t9 H6 Z: {1 h" C; j 8” fab experience preferred 3 A7 R; j6 j, Q; d Power device (discrete & IC) experience preferred 1 }3 Y6 w e) L* W( U Personality 4 s- N% }- }" e7 i p, {; ~# z Good Initiative,# z% k/ W# A% s0 V) q4 A5 j, {
Good executive, H5 l# c* R3 [7 |$ e
Good teamwork. Y# a' s* q4 x) o Activity scope 8 X" d t3 T6 c* {( X+ M Environment 9 j; C( h$ g& m( N4 v0 ?( A( F Location(work place): Shanghai, i7 Z( t' r- B/ n n
Work time( part time/full time): Full Time作者: ranica 時間: 2012-5-17 02:30 PM
招聘公司:a top 15 semiconductor company: W( w0 a0 ?: E6 x% f$ _
招聘岗位:PLC AE 5 `5 h; h" T4 D! Z* Q7 S工作地点:Shanghai" d- o. U, S+ e
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岗位描述:9 H. C) H6 C& H) `; Y: t
o Conduct field trials (Coordinate Installation, Debug installs, monitoring of systems performance, analysis of results) o Guide development team in various customers focused areas – Available SWR/HWR tools, product features, ease of use o Technical Support customers with design in of OFDM PLC ICs, Production ramp up of modules, system integration of XX’s PLC solution into other equipment o Writing of Technical Documentation and customer/partner trainings o Initial design/localization of PCB modules 2 K& s. a: M. w& M" A% @$ b- `2 R/ {( ~+ w/ m) Q3 v7 T
职位要求: ( D1 c# I1 M# U& }* {, w0 W. x- Be self-motivated with a strong desire to learn new things and work in a developing technology area. - Able to communicate effectively in English - Good communication skill and team work ability - Have excellent troubleshooting skills including hands-on experience conducting experiments with lab equipment. - 5+ experience and good understanding on developing Hardware and Firmware for embedded system solutions (in C) - A bachelor's degree in Electrical Engineering (BSEE) or equivalent. - Experience designing mixed signal circuits for OFDM PLC communication systems and protocols is a plus - Be able to travel often in China作者: ranica 時間: 2012-5-17 02:31 PM
招聘公司:A famous IC company 6 W l4 b0 d3 Z2 a/ z: t- t招聘岗位:Regional FAE Director . D: f* @. ?. }' X! g% m }工作地点:Shanghai 9 ^1 x' K5 D: |3 C5 w( q- K: i( R5 J* Q$ f4 `0 S
岗位描述: % Z) x& J8 T" n3 l5 V' [· Manage field application engineering team and global power resource center (GPRC) in China. · Develop technical support team both in technology capability and skills to support business. · Lead technical support team to provide best technical support to key customers, to increase xx penetration in China. · Coordinate communication between sales, product line department, marketing and technical support, to develop and execute China strategy. · Coordinate communication between technical support team, marketing and product line department in new products and new solution development. · Identify technical trends as well as current and future customer system requirements · Coach technical support team to maintain moral and passion and team’s stability. " g4 Z7 @6 U3 }5 f 6 j( E# o5 J9 q6 r4 L职位要求: $ r9 A5 g" T3 S* s+ V6 [· 10+ years experience in technical support or R&D. Experience and knowledge in power supply is a must. · At least 5 years experience in leading technical support team across region. · Good communication in diversified team members, be confident to gain others’ respect and trust. · Strategic thinking, good in business sense, be able to develop technical strategy. · Good in motivating team members to achieve goals, especially under pressure.作者: ranica 時間: 2012-6-4 02:06 PM
招聘公司:A famous IC company9 i6 a* m' R' }# X
招聘岗位:资深模拟设计工程师 : m8 V0 a; b8 x. |/ O& I+ |" t% o3 B工作地点:上海,成都,南通/ j2 b# D2 u3 D
$ P0 x! e+ R4 D6 `2 u. ?6 t
岗位描述: % o* Q1 l; A# Q5 y+ T1. 电源产品(只要是DCDC以及PMU产品的设计,特别是大电流DCDC产品的设计)。 2. 与销售和FAE人员一起制定产品的指标。 3. 与Foundry一起沟通选择最佳工艺 4. 指导版图工程师的布图 5. 与实验室测试工程师(AE)和量产(ATE)工程师一起制定测试方案。 f1 K Q/ S! M/ H/ {: j
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职位要求: 2 v# i, f" v1 e* ^3 v0 B1. 本科毕业,硕士和博士毕业优先考虑 2. 5-8年以上电源管理产品的独立的设计经验,具有PMU产品的设计经验优先考虑 3. 熟悉低压CMOS,BiCMOS,以及高压LDMOS等器件的物理结构和工艺制程 4. 熟练使用英文与其他国家和区域的帝奥团队沟通。作者: ranica 時間: 2012-6-15 11:26 AM
招聘公司:A famous European IC company& X5 W* o' K) V: R
招聘岗位:Sr. IC design engineer( z1 A" q9 ~& K" S! h
工作地点:Shanghai# f3 D$ ]/ x; _0 W& Z: V
4 _% ^: u( o |/ j
岗位描述:- x$ r2 @ P2 V9 y
Roles and Responsibilities - feasibility studies of circuits and systems (incl. HW design) - support product proposal and definition - analog IP and subsystem design and verification - top-/systemlevel verification - IC evaluation/debugging - test proposal and support transfer to production - plan and track project activities - coach junior engineers and interns + F4 o* o" v$ ]2 W+ x9 t
" N- J- A% r7 l6 [& M) C' T- ?: I职位要求:. l T5 v. P2 J1 X
Qualification Requirement (e.g. Education, Working Experience, Knowledge, Skills, Language, Competence, etc) - master degree in microelectronic circuits or systems - > 5ys experience in Smart Power Design - good understanding of ASIC analog and mixed signal flow (Cadence based) incl. toplevel integration/verification - strong background in smart power s/c technologies - experience in DC/DC converter and DC motor driver/control design - hands-on experience in silicon evaluation and debugging - very good communication skills, team work and high degree of flexibility - foreign languages: English, German (not a must)作者: ranica 時間: 2012-6-22 02:26 PM
聘公司:A famous IC company $ W7 I7 n& V2 ?" S, E招聘岗位:Sr. WLCSP development engineer 0 K. U9 s4 v5 u1 G' X工作地点:Shanghai( ^2 W& s& l1 y0 u) Z
5 s% U( k4 \' j1 F; T
岗位描述: - W! l8 R0 I% r) U7 G4 s- Q* o0 G8 K1) Act as WLCSP RD project leader for all the WLCSP related activities. 2) Integrated with Process / Product Engineering, Production, QRA, Final Test and Maintenance teams in the WLCSP assembly problem solving. 3) Developed new WLCSP packages from feasibility, design, process development, qualification to mass production. 4) Design the new WLCSP package for new application or performance improvement. 5) Improve the WLCSP assembly processes for cost effectiveness ' T& ` u8 ~. M7 E( z9 S( V0 l7 i7 o8 r9 Z
职位要求: 1 z& {" m* M2 u0 \(1) Bachelor, Master degree or PH.D. in Mechanical/ EE/ Automation/ Material Science, etc; (2) 10+Yr working experience of semiconductor WLCSP design/development or package R&D related field; (3) Experience with WLCSP NPI project as plus; (4) Good knowledge on mechanical design/simulation(Ansys or other software), material analysis, package assembly process, package qualification method, project management; (5) Ability to achieve results in a fast moving, dynamic environment. (6) Good team work, willing to learn, and logical thinking; (7) Good English communication (written and verbal) and interpersonal skills.作者: ranica 時間: 2013-5-15 03:36 PM
Senior Design Manager : B" }7 e8 _) F4 `/ d& A: d Q客户 A famous IC company ( X+ \$ e4 O5 a+ o1 ^9 N地点 Shanghai : z" {) s+ ]6 J; o/ B: Z# H* m0 v. @( ]' q
职位描述 1 X2 |1 ?' j4 C# ~Duties ) h; _8 E1 |* T- x2 h" T8 |Analog IC circuit design, simulation and verification * R4 \* w( L' w+ i6 Z Y) E; MDesign analog products and blocks such as high current, high voltage DC-DC etc. ( W: z a) n ~/ z& [Design of the switching power IC, Charger, Load switch etc.( k; Z; m6 }$ o
Evaluation, simulation and analysis of power architectures and circuit topologies k' p6 Z/ P0 V6 L
Mixed-signal circuit design, verification5 D9 i+ w% @7 _! y8 w R! C
IC layout including floor planning, DRC, LVS, and LPE, q: ^# Q- U/ M/ ?4 X
Work with application and testing engineers to define optimal characterization and testing solution ( L" A% q5 S, {$ ]* q1 {Work with product definers and product engineers in full product development flow & O: L9 U6 E# x: bWork with product line to coordinate/lead projects, accurately scopes out length and difficulty of tasks and projects. Establishing clear directions and set stretching objectives , R9 {/ W. |4 |0 wBuilding and creates strong morale and spirit in his/her team.作者: ranica 時間: 2013-5-15 03:36 PM
职位要求; ] D5 P' Q$ D
Requirements$ M; C s9 v" g' c, }
Minimum 10 years direct DC-DC IC design experience, with MSEE or above degree/ a; G. G+ ?" E* M5 v8 g( q2 x
At least 5 years leadership experience in leading a mid-sized team ( }1 s7 [3 u H$ B4 G8 gStrong knowledge in analog CMOS and Bipolar IC design9 o& `3 ?" s) W, y
Working direct experience with switching power supplies, DC-DC converters, Battery charger, and their various topologies3 N- X9 ]; o3 @" M- P
Theoretical understanding of the power electronics, switching power supply topologies 3 k! [$ d& g& U6 T! P8 R6 j. `Prior experience with power management related IC design a strong plus! ]4 t1 b/ U F
Knowledge in analog IC layout . _ M3 M9 b9 o( AMatlab/Simulink/VerilogA or other behavioral simulation expertise a plus : u+ m% M; o6 G' u. ~Result driven and can effectively dealing with ambiguity, U; L# C& F; v& L$ s
Excellent written/oral communication and presentation skills. 9 F' Q/ C, O# v# b5 ~9 G
Understanding others, picks up the sense of the group in terms of positions, intentions, and needs, what they value and how to motivate the group.作者: ranica 時間: 2013-5-23 03:31 PM
Senior Design Manager % [% g- k2 E: g/ K' _* A3 y5 \公 司:NO.163-A famous IC company 5 A& |0 C) V5 } M- |工作地点:上海4 l. x: ~" O' G4 C/ o
- [4 x. i7 ?& T% q2 ?5 k; g! N1 YDuties 5 X! T! W: O$ _3 S, L7 WAnalog IC circuit design, simulation and verification1 _; X; m. r% g7 i0 s2 p2 b% L
Design analog products and blocks such as high current, high voltage DC-DC etc.( z& g' H, K* Z! o% p+ L
Design of the switching power IC, Charger, Load switch etc.. }& M1 |( A r( D6 U4 v" T0 e5 ~
Evaluation, simulation and analysis of power architectures and circuit topologies p. a* F0 P4 s8 a& Y. gMixed-signal circuit design, verification D O- }7 e/ o' b- i+ x- {
IC layout including floor planning, DRC, LVS, and LPE' i3 J1 o! o* @4 x& X! F% Q0 q4 K
Work with application and testing engineers to define optimal characterization and testing solution . ~. C+ B9 k& s$ w2 [) N6 ~! pWork with product definers and product engineers in full product development flow " u1 U5 `6 C* |1 b/ w0 T, B# h' ?Work with product line to coordinate/lead projects, accurately scopes out length and difficulty of tasks and projects. Establishing clear directions and set stretching objectives7 {( L" N& A. T1 e& z" m
Building and creates strong morale and spirit in his/her team.作者: ranica 時間: 2013-5-23 03:32 PM
Requirements , Q3 A6 ~# d8 k6 F' m- aMinimum 10 years direct DC-DC IC design experience, with MSEE or above degree# W( s) D- |9 V5 P- H1 Y6 Z; ~4 h
At least 5 years leadership experience in leading a mid-sized team : ~% |& h- S9 uStrong knowledge in analog CMOS and Bipolar IC design: {* v+ j, C( K5 b
Working direct experience with switching power supplies, DC-DC converters, Battery charger, and their various topologies! ?- o, J5 \6 O- Q) f3 ~7 m$ p
Theoretical understanding of the power electronics, switching power supply topologies' \3 @9 I; A b! F" Q
Prior experience with power management related IC design a strong plus) Q' [/ ^3 k1 X) Q
Knowledge in analog IC layout " A: V- i, o# ^: LMatlab/Simulink/VerilogA or other behavioral simulation expertise a plus - h n5 ^9 Z* N* f$ U" n6 yResult driven and can effectively dealing with ambiguity . ] }" o- l" q* Y( H* t, @- nExcellent written/oral communication and presentation skills. , ?- D( m0 c/ Z# }
Understanding others, picks up the sense of the group in terms of positions, intentions, and needs, what they value and how to motivate the group.作者: ranica 時間: 2013-6-7 05:38 PM
国网资深方案工程师(软件) 8 [# }% b4 K* w5 G/ |: Y( G+ a4 Z1 M" v
公 司:NO.116-A famous IC company, o4 P6 _; p6 u8 ?8 b
工作地点:上海 7 F: D9 m* r4 X$ r . j4 y) n# G$ S% x) k工作内容: - Y- V$ x9 c+ U7 \9 A9 r
1、负责xx电能芯片的整体方案设计。 1 O4 Y4 v) y2 g9 i8 w6 S8 T5 d1 i1 U+ J) _+ }
岗位要求: - w8 S. j& r+ z& Q7 T- t' k1, 本科及以上电子或自动化相关专业; 2 Z. o3 u$ \& t( j0 X2, 有3~5年以上国家电网电表软件研发经验; / {2 a- x6 b2 O8 N3, 做过完整国网单相方案,且实现量产; 8 |9 n3 o" E3 g! L6 N5 O% r$ t
4, 深入理解国网单相电能表的各项标准,645通讯协议; : {4 }. D7 } Q1 C) ~4 o" Q5, 深入了解单相国网软件架构、软件测试流程、及送检流程; * N8 R+ E% x2 j
6, 对国网单相表的硬件有一定了解; " r8 [. h. i/ h0 X3 `+ s
7, 有良好的沟通和协调能力,善于团队合作。作者: ranica 時間: 2013-7-5 10:09 AM
Senior Physical Design Engineer3 \5 n9 v" [# E
公 司:A famous IC company 4 g4 @- N3 Z' h+ x- X Y工作地点:南京1 U4 u$ W! c8 }& `, n2 C; n
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Key Responsibilities " d. Z+ X3 ^0 Y* l; oDepending on experience, key responsibilities will involve some of the following: 1 ^) a! p- ]$ @9 \ O" FIC implementation from netlist to gdsii, with synthesis, floorplanning, place and route, timing closure, and physical verification. * A- Y" @3 d7 X. [4 E! IAs a key member of physical design team, your will work on one of most advanced and the most complex chip designed. : K- ]% w, V# ZLeading a team of physical design engineers and resolving the technical related issues. Y: ~* o/ D7 Y5 o
Crosstalk analysis, power analysis, and static timing analysis. 9 o- _/ @- B0 q8 R: r
Write scripts in Tcl to improve productivity. 8 v+ G4 Q& Q+ [3 I, P0 B, g- E ^ ~4 t
Experience: 5+ years in physical implementation engineering $ K4 n; P% U* M( @) f3 g3 `: m
& I- I" Z3 {1 s; K/ wEssential skills ) T" O/ S9 G" H- W, e: qMS in EE required.&#8226roven track records of working independently on place-and-route project running and DRC/LVS/ERC/Antenna debugging skills ! N* K' M% e& h& T7 \
Experience with Magma or Synopsys place-and-route tool set and physical design project implementation. 2 D) u* W# N% U3 m/ _7 B- J' _5 @2 rGood programming skill. Capable of writing Tcl or Perl. $ |# a( I3 ~- qFamiliar with synthesis, static timing analysis. " v& D7 u- y; G) fSelf-motivated team worker, good verbal and written communication skills in English. g2 \- ]# X3 f" S' J+ ]
Technical and team leadership proffered. Previous management experience highly desired. : D5 D+ `# T! M, ]# ` ]; \( d
Experience with synthesis, DFT, and verification is preferred.作者: ranica 時間: 2013-7-23 02:28 PM
Senior NPI Engineer (SSD Product) 2 D8 M5 {; G8 t5 g- b7 a8 ?- j. G9 w0 C6 \
公 司:A famous flash memory company8 k% ~+ G; f: d. p
工作地点:上海 4 ~7 I: T* c s' N1 i1 y # ` [2 z( W( t4 k) z& f! bResponsibilities: 3 C0 T$ v+ O. h2 _3 y! l) w7 e
Work with the global engineering teams and subcontractor engineering team to define performance matrix for *** SSD project and program in Shanghai & A! B% y/ V0 e. Q Develop and implement NPI holistic strategy and process for a scalable new product development and implementation process for SSD program & n5 o; k& E/ v
Manage new product capacity planning and scheduling (with IE/ MFG team). Ensure product ramp-up and on-time delivery. 8 M( c% Z6 d5 t4 L% A3 _1 E+ h
Develop and implement product end of life processes. 4 R8 f. C, O; c- P( Z0 k
Work with R&D, MFG, Engineering team to develop and standardize process for new SSD product . }4 g, d- g" ~( X0 V; o3 d H9 F2 V. H$ ~) L4 ~, O
Requirements: ' W& N, c2 l7 u BS or MS Degree or above in Engineering or technical discipline % n% h& E, i5 Y
More than 5 years solid experience on new project management of storage /consuming electronics products. - Z/ \5 f4 {7 U* s
Excellent English verbal and written communication skills, native English speaker preferred. % y. ^8 w% g. u2 {6 @ Must have good interpersonal, strong ability to work in a team environment. U. C: [8 w. t, _2 V. a! E- Q Worked in International environment and can coordinate within different groups (cross functional team) 9 x1 b, D) v2 H$ E0 M1 K% }& ^
Self-driven作者: tk02561 時間: 2013-8-7 04:34 PM
R&D Software Engineer or Senior R&D Software Engineer : O8 \& A% v5 d/ L* j8 s, b% H' u2 G6 v$ l1 d* O! {$ t" q6 J
公 司:A famous IC company : ^- _& x/ |* M. A工作地点:上海 0 g' P! ?: ~1 Z A8 e " u) g G2 O. e2 vResponsibilities: 0 X7 k3 M: k& K# h5 ]& g* _- Design and deliver software components as a member of a software project team 0 u# N- m' n* p! L" W
- Maintain the assigned software component as module owner * a& X: t& h4 u1 O9 n
- Collaborate with SW team, applications/field team to resolve issues and to fulfill customers’ enhancement requests / x+ _& m+ \2 n, L; c" C* n- Support the worldwide application engineers and the customers , k$ p- E4 x5 V- O8 |* G* p- Maintain the software documentation$ g, O$ J$ |: X( v. m! U
/ f: L4 n" X$ O- B/ q+ K8 T2 N' r; a8 q
Qualifications ( W3 j# F6 v6 m4 f& s0 L7 L
- MS or BS Computer Science, Electronics Engineering or related discipline, with at least 2 to 4 years experience in software project or software development ; \$ T2 D* R+ M0 ^' W
- Strong experience of C/C++ 7 ]+ B9 l& R" U# ^4 D
- Optional Java experience 6 m, H7 D: u% @3 L1 A- Strong analytical and problem solving skills - V- _7 A% \ p* O% o( ]0 s. ?
- Result oriented, positive attitude and a good team player ! o- {0 V% O% S0 K; n+ p- Experienced with modern software development methodologies such as OOA&OOD ( j3 C! g/ X" A- Able to read and communicate in English, especially in technical environment + Y5 F+ U7 H3 w6 R" A( |1 W- Willing to take responsibility and showing initiatives + O$ X# k- ?. }3 U# R+ J
' |0 ]: l, h) P6 d8 N
Preferred: + p, E8 i P# Q# K; t- Basic IC test knowledge or 93K knowledge & \. A# [( ]! b2 R1 r: J/ \7 p- Experienced with software development on Linux or Unix platform : |& ~+ [6 D1 g: Q7 f3 w r/ L- Experienced with modern software development process such as RUP Scrum. 5 k0 y/ c! X& P8 u9 e" ~9 B2 n4 P
- Strong organizational skill to work with cross-functional teams in requirements analysis, architecture and high-level design # U8 x6 _% C8 X6 z8 C; h' `
- Experience in customer interactions 6 f% D& `9 e! |3 X- Cross cultural / international experience作者: ranica 時間: 2014-7-28 10:49 AM
研发总监 0 J9 R& p: G9 ~' a& d7 F; @' \) s0 _. d3 h5 r+ _; X
公 司:A famous IC Design Companies in China 0 m* K- Z& j7 H4 a) j工作地点:上海 ! |( _: G6 `4 i) X. g$ @, s' }, n% ]- N$ `1 N7 Y" ~
主要职责: 9 P4 s `. H# c Y7 W8 {/ |
1. 根据公司战略规划,组建并管理公司研发团队,完善部门制度和流程; ! R o0 ?& u9 C! ?2. 参与公司新产品的规划、设计和开发,主导新产品量产前试产,审核、评估及整合试产结果并提出改良意见; 6 ^' \6 s6 [# s+ T" E# O6 l* f
3. 规划、指导和管控所有的研发活动,包含整机集成、软件和硬件研发等; - U7 D- r& I; f5 y
4. 掌握手机行业的技术动态和发展方向,与上游厂商及互联网平台保持密切联系; * s4 D) F! c" Z$ k5. 指导并监控产品规格设置、原材料采购、供应商开发和文控文件支持; # [0 M L m" s0 P" p6 n+ D6. 部门人员的日常管理、培训和考核工作; # E5 ^) p0 ]" J+ {) G9 h; e q' z 9 K4 r4 G7 g+ G教育背景: 4 ]4 }- I% F* Q. R' v. d1 ^电子、通讯或计算机专业全日制本科及以上学历。 ( E0 @1 E; P, _* q, O% n/ S
4 k; l; a+ u$ Z: B# X' C7 a工作经验: 4 a2 r' S, {) U/ G
1. 10年以上研发岗位经验,5年以上知名手机研发团队(20人以上)的管理经验,3年以上高通平台开发经验,3年以上Android 智能手机开发经验; ) L% I' O9 e$ g+ T! o2. 具有较强的市场意识,对市场变化及市场趋势敏感并能提出创造性建议; - p3 s8 k. M) F% s4 H3 q3. 具有丰富的团队管理经验,良好的管理能力及解决问题的能力; ! B) N6 L( M# \
4. 有进取心和强烈的责任心,能带领团队进行技术攻关;作者: ranica 時間: 2014-7-28 10:50 AM
高级硬件经理 7 [" _- Q9 ^* O( ~" R9 i- U: s( a, v, \, k7 M- `; C
公 司:A famous IC Design Companies in China' ]1 q- y/ l8 @# `4 q
工作地点:上海 $ e+ p3 l; h* P+ S# [0 n6 x7 B/ ^' ~+ p
岗位职责: . q3 k- H1 F" }/ A: O# I) k+ |+ H) \
1. 负责硬件部团队架构设计、人力规划、人员招聘; 6 H8 }5 A g, l5 c: I2. 把握硬件平台技术发展,研究新技术,牵头疑难问题的攻克; 7 i5 {5 W; J% R
3. 参与规划元器件认证流程、标准,形成企业标准元器件库; # \7 Z" V5 {7 R% ^' k) |
4. 掌握手机行业的硬件技术动态和发展方向; & s E' S" ~$ c! B! B' g5. 负责硬件部相关流程、工作规范的建立和执行; 5 Y" i( U) z# d- F6. 负责硬件部日常管理、培训及考核工作;: i x: X' Y( ?2 n! h2 h$ x+ \
/ S3 g' \) b" q e6 V w4 n9 H
教育背景: ! ^; @( X7 m# q; |5 X8 h# i
电子、通讯或计算机专业全日制本科及以上学历。 - t0 P: x/ q s, [% |7 a) ?( @2 l3 |! d: {* H$ u2 o7 S5 l
工作经验: 6 F% H/ D$ c- X k( J4 z( A" x. I
1. 10年以上研发岗位经验,5年以上知名手机研发团队(20人以上)的管理经验,3年以上高通平台开发经验,3年以上Android 智能手机开发经验; 9 L* s) P+ P9 k: B
2. 具有丰富的团队管理经验,良好的管理能力及解决问题的能力; $ I& i _' b$ t3. 有进取心和强烈的责任心,能带领团队进行技术攻关; ; ~$ o! O1 ]. h2 X
+ P( I6 F: [* c5 H( S# o, @
专业知识: . A2 i6 m( e% | G; W1. 具有系统的无线通信专业知识,熟悉并掌握手机硬件系统的开发设计; % j. |- ?6 Y/ t+ h, O: r3 P# \# p2. 有天线/RF上有丰富的经验优先;作者: ranica 時間: 2014-7-28 10:50 AM
BSP FAE : ]! v* h0 h' _: T 0 j2 G& E8 o. j公 司:A famous IC company% ` o/ W, Q1 U7 P) }& t/ |
工作地点:上海+ {; y7 z. I, v$ U/ O- B
0 c4 r* i! Z2 j9 B1 v+ h) b
External Description 0 F; ]$ Y% G. _
Work closely with customers on Android smart-phone projects with perspective in software part from board bringup to product mass production . ^5 C* Q8 {: N! J- h; O& C Regularly solve customer reported BSP/Linux issues timely or report to backend R&D to solve it timely. ! i3 k# d" C+ ]* z9 S+ l Onsite board bringup, failure analysis per customer requirement . h$ Q) ^, |( }$ Z
Organize technical meetings and trainings with customers engineering team per sales request1 x9 M1 r$ G8 v8 }7 U
7 P1 _# o3 E' b- O- R/ v% u" d
Qualifications . R7 F+ n7 D8 Q9 A0 x8 ]1 d2 r) S B.S. degree or above in electrical engineering, computer science or equivalent. ; Q' W- X5 |/ w5 @/ C
Solid knowledge and experience on C/C++. & [2 ~$ H" g7 |. K8 [ 3+ years of Linux driver develop experience on ARM or equivalent embedded platforms. . N# ~2 Z- C5 x4 x5 R, }0 A Basic hardware knowledge will be a plus. 5 W6 c; B. O" v7 ?8 X' @ Good communication and can work as individual and under pressure 4 s/ g3 L) {$ s5 u, x' b
Good English read/write/oral capability.作者: ranica 時間: 2014-7-28 10:51 AM
模拟电路高级工程师 . `2 F, `% w1 u' ^( D2 v" r8 F' z8 Q+ A% I8 }! |
公 司:A Chinese integrated solution supplier $ S1 }: q- [: P0 r; u工作地点:深圳 & K. G! W/ m' P; C , i2 I4 q9 b m; z7 d* _岗位职责: ( g( G5 K: V2 K1 ^/ |- T3 b2 n5 l
1. 微弱信号检测电路研究; / X# Q( K, d9 ]* F& }5 J9 M+ E
2. 芯片方案原型平台设计与调试; ' g( G2 r' u9 O/ S: n6 |, p) @
. q9 p$ n n4 B' K' \# s任职要求: + h( @1 ~4 h& q! b" m& h: F
1. 本科及以上学历,2年以上相关工作经验; l* R* X8 U1 z4 t! |5 f2 k6 u4 Z2. 通讯、电子、自动化、物理或数学专业; ) `4 A- Q, v5 P$ j
3. 思维灵活,有创新精神;作者: ranica 時間: 2014-7-29 11:25 AM
Industrialization Project Manager7 U6 B: e, U' f1 v
5 J/ I/ e+ C- p3 C7 ~公 司:A famous IC company , H; X2 d0 u% T% q. D9 `( {' x工作地点:北京/ a! B' a6 C: G8 J5 A
2 a" E9 V- k* ~! t" y
职位描述 4 h- g; W x, [: ^3 `) o( F1.The industrialization Project Manager Job purpose is to manage execution of Industrialisation Project activities,from Project Definition/Architecture though Product Development/Validation to Customer Deployment/Project Closure, in order to meet Project requirements and objectives in terms of scope, quality, schedule and cost. 7 b3 W2 o' {9 d" i2.Assisting R&D and project Manager to design cost effective boards and leading edge technical excellence. 9 i) w5 B' f& J l3.Building and maintaining the industrialization project plans. + u! ~4 M8 s) Q0 y# q
4.Managing the Industrialization project execution: schedule, milestones definitions, risks management, and KPIs management in respect with the ** milestones.8 V$ Z5 |& B# c4 ^- g, \* x' N: B4 a
5.Managing boards and test fixtures requests in order to meet core project time scales whilst also ensuring lowest cost of ownership through cost effective solutions. * c1 X: l$ H4 W B) ~
6.Controlling and reporting the costs related to the industrialization project and boards manufacturing, manage the budget and active contribution to the build cost forecasting. 1 q8 _, e4 Y- N% o' R; B7.Reporting project progress and status to the Program Manager as member to the Program core team. ( B& H& W% t: g% N1 }/ B8.Ensuring that all change requests are managed with the proper priority and severity to match the project targets.作者: ranica 時間: 2014-7-29 11:25 AM
9.Ensuring a close alignment and cooperation with the HRP and R&D organization. ; F% h5 V& w7 @. A- C: w Z' d* g10.Supervising supplier’s execution (factory) for boards manufacturing. ! W& A. i' w8 P11.Managing communication related to boards manufacturing (delivery plan, yield, ...). 0 y8 t1 W$ M9 Q12.Ensuring that error data base is filled and means are put in place to recover faced incidents. 5 v2 L& Q1 r3 | H5 ^13.Synchronizes / manages cross functional teams for Component sourcing, Test Software, Repair, Board testing ….) y, R1 p6 m7 L1 V: Q' ^
14.Manage Industrialization activities and the related costs, ensure that the higher quality level is reached, and schedule is kept.& L6 w. Z1 z1 K1 n% W% H5 D
1)Supervising Component sourcing and purchasing ! Y$ I K G+ |
2)Supervising CAD and Layout activities when included in industrialization project # X3 `" O; B) W0 |; Y3)Managing board manufacturing activities ) m9 o9 w/ r# u$ C% p, V4)Managing board and test fixture requests ; i& ^" `* A& \0 w$ i* ^" u5)Communication (achievements, strategy, risk) & u* m: A# Q4 H/ Z6)Priority setting + c; Y, t+ |3 ?; L# `# z7 H3 }
7)Boards Delivery ! b" @$ |$ P! @+ E9 ]5 M) B& R8 f8)Budget control and report , x+ C4 z: q9 t6 B
9)Build and budget forecast " G" d: D( w: k j) S2 `1 j. b z15.Ensure proper resource staffing for the Industrialization Project % ~9 a0 ^* D5 ~6 V
1)Validate through the overall Project organization the overall Project demand towards HRP Line Managers and external suppliers for allocation. & N) b) v7 S# \
2)Identify gaps and propose solution to the HRP Line Managers. 2 |% ~6 x# V3 h2 P
3)Track monthly effective allocation 6 L- i- t7 n; d3 d' k2 H16.Coordination of multi discipline teams (Sourcing, procurement, Hardware Design, CAD Layout, Electronic Manufacturing Supplier, cost control) by means of ) K7 Q' [) C. r) Y3 r1)Communication matrix to ensure communication channels are clear ' q9 q' _5 ^# H4 t17. Animates a core team of 7 people & _- m# W- t9 F% _3 q# w0 Z& ~
18. Reports status during monthly OSC Review at Hardware Program level 0 d1 p6 a5 d+ w" W7 ~1)Prepare and present material to pass milestones - C) U* S1 C$ n) B O1 F2)Official formal reporting ! H4 G1 C& D1 O1 y19.Manages external suppliers: Electronics Manufacturing Supplier (EMS) 8 R8 W& [! N7 _5 _/ T+ Q1)SoW, contract contribution and review and management escalation, k2 B2 X7 X$ f% P' H
0 B. s! f+ ` o; M1 t, P
1.Project Management Methodology – Advanced & r8 V5 C8 {. S: J6 m2.PMP or assimilated certification - Certified ! p0 v7 y L# _7 F- I3.MSP Scheduling - Expertise 3 c+ ]4 i. J9 s: |' B# [4.STEPP Process - Expertise , u% W1 A" P- a) u0 I5.Specific Technical domain - Deep knowledge ! h& D4 d2 r) F; F6.Engineering degree in Electronic # ~- s% C; J7 [6 K7.Good in spoken and written English (the boss for foreigners)作者: ranica 時間: 2014-7-29 11:26 AM
Program Manager(Home)0 b p8 Z e+ ]% I& k
y& X" F; c- h: M7 Z! ^3 O公 司:A automation company8 Q) T" e0 b& K; u$ S- n
工作地点:Home; |2 B* ~- J( C$ a8 i
. L. |# a6 o2 g% a
职位描述1 \* v2 v; P% W; j
1.Work with company’s customers to provide marketing (web, graphics, user interface, print, collateral marketing, program management.) services by building a service provider network. / \# {8 S# t" P2 A: l* z2.Develop a network of call centers that would drive telemarketing campaigns on behalf of company. # [/ H( G: g, M) n" A9 D3.Support of company’s effort in sales & marketing areas to acquire new customers in China. 3 W$ W4 u+ a6 V A* c* L' e: K; A {4 g) d& B职位要求; p9 `' N* U. G( z T, R. i
1.Good communication skills (Both English, Korean and Mandarin written & spoken) $ k( P- u1 w2 m" _2.3-7 years work experience . y$ j6 k. k& P4 [& j! o1 i3.Client servicing or Client handling experience * Y6 Y4 z9 A. T, g; F
4.Should have very good interpersonal skills 3 Q6 x/ g8 T0 C0 I) Z4 x3 W
5.Should be proactive in picking up new skills & knowledge ' C2 b% R5 ?, A: v5 T5 H6 U
6.Well versed in MS Office (Excel, PowerPoint, Word)作者: ranica 時間: 2014-9-24 01:55 PM
Director of Engineering 0 r7 d9 P. E/ N1 D' V, H2 \( W. Q! q公 司:A leading supplier of optical communication products $ X4 z4 H; J8 f% e) }% M& U* H9 j工作地点:成都 1 H- ^7 c- G: E; S' { / h5 n" S" T+ o* y3 PMISSION Why this position exists ) ~) C1 Z( M$ F. Y
To lead the overall engineering disciplines and functions to achieve the next level of process robustness via engineering solution and innovation. : G, C* ^& M1 M: b( w: YWork closely with AME to provide solutions that reduce the variations. 8 _7 }, U3 K1 D8 h- h* Y- Z OUTCOMES: desired A performance in year one 7 u- q9 z6 A8 c
1st year’s A performance – 4-5 objectives that if achieved would represent an A-performance 8 V+ H+ s1 N. ?, N
· Structure and Optimize the Organization, per SD/BT. - Z p5 c0 u% ~: U
· Be able to have 5 major error proofing solutions implemented. % H; x6 d& Y' `# u
· Drive cost down that improves the Gross Margin. ! D' e+ u% R* H
· Automation deployment.作者: ranica 時間: 2014-9-24 01:55 PM
COMPETENCIES: Weighted requirements list: (candidates should be or have the following) ("weighted" on a scale of 1-10, where 10 indicates the most critical, important and 1, the least): 7 S* h: W h% T· Practical experience in multiple engineering disciplines, including Test, Process, Automation, Facility, MFG Engineering and Industrial Engineering. : 109 O4 D$ V3 x7 h8 u7 |
· LEAN Deployment Experience: 8 & l+ y7 p& Y$ h$ t· Hands On Experience in Facility construction: 6 + K" p5 u3 |) ]( _2 {3 F
· Self starter, with a proven record of demonstrated initiative: 10 1 f% G, F, {) {+ a- c( |1 o· Display a strong can-do attitude, determination and grit: 8 0 t- f# K( L6 e9 ^7 H
· High EQ: 8 5 `/ s& M! u' N0 W/ Y1 q0 f· Collaborative, with the demonstrated ability to get projects done in collaboration with established teams and function/process owners: 8 + q8 S( s0 m( t& O2 p: r% p+ d· Ambitious: still in the upward arc of his/her career: 8 # |6 z7 o) L6 n9 x) H3 @6 `5 P% ~
· Pragmatic, with a good sense for finding high-impact applications: 8 " C4 ]0 Z' M1 T· Experience in one or more of these associated fields: precision optics, test and measurement, high-end electronics, semiconductors: 6 + E: `8 u1 t7 j' T· Experience working with engineers in China, Taiwan and the US: 8 , I" t5 b+ _; y. X. L: p* \7 K· Fluent in English: 6 ! T9 w1 R$ T' q( S, ^· Hands-on and detail-oriented: 6 ' S) @& Z+ q; t· Have strong program skills: 6 $ o! q) |8 g- w% O, K· Have strong project management skills: 6 ; `* Y& I1 z' q
· Fluent in Mandarin and written Chinese: 8作者: ranica 時間: 2014-9-30 08:12 AM
产品总监/经理, v* |% N) g& `: L* n8 o
公 司:A simulated chip design manufacturers - H6 t7 \; V3 m- U; o7 S工作地点:深圳 7 x C! l( y' b; q2 \! K8 m3 o8 \/ o$ l U x
工作职责: $ s$ p* x7 T& `2 L1、根据公司发展战略及电子消费品市场发展趋势,负责公司产品的规划和新产品的开发; ! i; y( w( i7 n- \ ~) V0 a8 o$ q% W- n
2、通过市场调研,对新产品进行定位、规划、设计,并与研发、市场各部门进行论证、实施; ' |& E% _) j3 U7 I
3、针对产品进行技术改良和产品概念细分,丰富产品品种,提升新产品市场竞争力; - t9 \' d9 a6 U7 m
4、带领和协调产品、设计、推动产品的开发进程,仔细体验产品并找出相关细节优化点,包含但不限于视觉、性能、功能、交互等方面; 1 L" K* ^ [: i1 |
5、跟进新产品市场推广情况,根据用户反馈信息,不断完善产品性能,同时不断完善新产品的品种开发,组织监测市场调研及相关信息分析; # q7 n5 W+ l3 H" l; H5 q6、根据企业发展、市场环境、产品的生命周期等因素,进而调整产品水平; : D6 E# p7 l3 ?; u& m2 i
3 z* x# _6 I* z6 _) {0 x任职资格: 9 n5 c3 N7 t: r* r$ W. Q1、理工科及相关专业,本科或硕士学历; & W: f- C. n2 j. e9 G7 P) a7 q2、熟悉消费电子行业产品经验; * j& u5 m% v% W4 {
3、有责任感,有韧性,抗压能力强; 7 i) B8 i9 Y, I9 V8 r
4、有8年以上团队管理经验,35-40岁以上; 7 U9 X" ~3 |$ P$ v/ O
5、对市场敏感度高、知识面广、项目经验丰富。作者: ranica 時間: 2014-9-30 08:12 AM
Business Strategy Analysis3 \" m2 F; \; d
公 司:A leading supplier of optical communication products 0 k3 Y( J! t4 O+ n工作地点:成都 : H7 |9 E. W: J; {( i3 k9 m * o- U( k3 S% Q+ U: \Key responsibilities include: ! ^' a" }$ g d2 B t! ]. v+ }
- Conduct research when given a topic on certain part of the industry, segment, product line, competition, customer, or any players on the industry value chain.; w& e9 | [; y5 H- V# \* X
- Structure the framework around the topic and interact with people carrying knowledge inside company at any function to validate and solicit input to mature the framework : S/ K D3 n, l- Collect data needed 4 l& ]5 |* D. {( a4 b! o: O8 D
- Analyze and modeling the data around the specific requirement 7 t# ]8 G' D" P
- Be able to articulate data and solutions in visualized way (in a PPT) 3 W) }8 c" {: f# G* ^6 \
- Assist executives to take ideas into PPT presentation $ B+ ]( i# o5 t1 ?! P- Assist M&A modeling and analysis 3 J$ x* G2 a1 U5 S
- Assist building business case 0 U: i/ d8 e1 }/ W, C
- Structure complex business problems and analyze to uncover recommendations % ~: m; X6 M+ W- S/ h
- Discuss your learning, analyses and recommendations ( C1 j# e1 s4 X0 ~. X3 I$ ?! {
- Create a way to track actions, if needed ! Q) \$ p+ I% ~7 T8 |3 y8 j. R5 F- Assist strategy EVP for other matters needed作者: ranica 時間: 2014-9-30 08:12 AM
The ideal candidate will: , ?$ Q8 P% H( q6 {4 T8 x- Bachelor’s Degree in Engineering, Mathematics, Economics, Finance, Marketing or other analytical discipline 1 C7 r! x; _* I8 X+ m& B- Have a strong commitment to personal and professional excellence and growth 1 _" b5 V# X. j- X( I; N
- Must have 5+ years of experience in an analytical role in strategic marketing, business development . `5 Y$ U3 T+ X- b( j6 k
- It is a plus to have worked in financial analytical role 9 ^' k& B G k* _
- Ability to demonstrate basic financial and business knowledge - T7 B/ O/ |% h/ `3 e" ^
- Be a team player and possess strong interpersonal skills including excellent communication skills ' y0 P1 T# w% {: d9 w
- Advanced Microsoft Excel and PowerPoint skills 8 b: `; Y+ j8 s
- Foundational knowledge and understanding of statistical concepts ' z9 b, r. E g& u4 s' o8 u X- Excellent written and oral communication skills , r5 E {- f! x
- Highly motivated and willing to do what it takes to get the job done作者: ranica 時間: 2014-10-15 12:25 PM
Product Business Development Manager% X i. V7 v+ ?/ k
公 司:A famous European IC company: L5 v# w: @* g. G( |; h7 E6 J" a
工作地点:上海3 i7 g3 B- e& v N
# A) a" @9 ~) Z q# M" e/ [8 JRoles and Responsibility: + i: n! ^" _+ I- p8 a
- Promote the product at customers and sales partners; cooperate with sales at developing customer specific promotion strategies. 4 m: w- H3 T6 Y3 X& B4 r E- Introducing new product into new market. 8 i' J) J3 F: x% I P/ `5 a. w
- Provide customer, market feedback and requirement to PM and proposed product features for better market coverage+ ^+ Q. [" @$ Q2 R+ X
- Secure orders and achieve sales per budget and sales forecast. , s+ J4 _* U b/ O! Y' u) o+ k
- Focus on business development with major customers prospects * @+ A3 u* e7 |) I; G' H' m- Develop and drive a business plan which includes focus account profiles and penetration plans, that support the system solution of customer needs as determined by the long range market segment business plan 5 D4 u( q' T" T7 X) {- V! w- Regional travel is expected to ensure relationships and business opportunities are being developed4 s, H% D0 b4 c" E1 I7 a5 X
7 w/ m. V! ~. ?( u) ?; g8 e2 a
Qualification requirements: , F6 l; C- r, i7 @% }( U8 G
- Proven track-record(5-7 years plus)of success in business and/or commercials roles in CE production - z! M$ X% |7 W' b8 Z- Experience in sales and/or marketing/product marketing and /or business management - Q$ P* t9 ]! `( E
- Experience in consumer electronics industries including mobile communications, wearable device and digital media 6 t8 k- o0 R6 E- Must be an effective communicator with the ability to interface at all levels within the skills, high credibility. Good social skills, ability to establish open communication作者: ranica 時間: 2014-10-15 12:25 PM
产品总监/经理; V9 |, U8 ^! z! o ? i6 C3 C
公 司:A simulated chip design manufacturers 3 A" Y$ R& t R% w/ G工作地点:深圳! L6 q6 ^5 I M" V2 |" k3 @! k
8 }# q7 H2 d& K1 P! P
工作职责: , n' C) i0 _( R- o2 ~, g
1、根据公司发展战略及电子消费品市场发展趋势,负责公司产品的规划和新产品的开发; + V/ _, Q! k/ P# z
2、通过市场调研,对新产品进行定位、规划、设计,并与研发、市场各部门进行论证、实施; 5 X% y5 ]# ~$ ^0 N$ m+ L' G% W3、针对产品进行技术改良和产品概念细分,丰富产品品种,提升新产品市场竞争力; : y8 |1 F9 S* w2 @- Z4 ~) Z
4、带领和协调产品、设计、推动产品的开发进程,仔细体验产品并找出相关细节优化点,包含但不限于视觉、性能、功能、交互等方面; 6 T; [' v6 \) i) Q8 H5 a/ q. H, T2 ~
5、跟进新产品市场推广情况,根据用户反馈信息,不断完善产品性能,同时不断完善新产品的品种开发,组织监测市场调研及相关信息分析; 3 b" @' J; u, @0 B5 P D& n6、根据企业发展、市场环境、产品的生命周期等因素,进而调整产品水平; # n, G5 o2 e# m' W% V6 I6 w& ~( P$ |; V1 o
任职资格: , N9 F$ w/ m9 f% G9 D1、理工科及相关专业,本科或硕士学历; & g7 D) n5 ^! i3 H) K* R
2、熟悉消费电子行业产品经验; 1 p4 P. g" c9 p
3、有责任感,有韧性,抗压能力强; o# M) o6 Y5 S9 O% w4 X4 v8 ]
4、有8年以上团队管理经验,35-40岁以上; . O! M) O) i8 a1 n4 D
5、对市场敏感度高、知识面广、项目经验丰富。作者: ranica 時間: 2014-10-15 12:26 PM
Director of Engineering 3 z+ {' G q# _$ k9 o1 m! |; B公 司:A leading supplier of optical communication products $ p+ y+ |: _' ^. K) f工作地点:成都 ) i+ D6 X: W8 T& E0 B5 s# U' M% x
MISSION Why this position exists 2 R1 z8 G5 H Q% h% i& s& ?. p& t
To lead the overall engineering disciplines and functions to achieve the next level of process robustness via engineering solution and innovation. 4 y- P4 O/ f: }0 S5 p! E: z% {
Work closely with AME to provide solutions that reduce the variations. 8 K ], i( d0 a/ j OUTCOMES: desired A performance in year one ( ?; H+ d2 p6 D. A
1st year’s A performance – 4-5 objectives that if achieved would represent an A-performance 3 J) m1 g' L2 G! q2 L7 C& j, K; n
· Structure and Optimize the Organization, per SD/BT. 5 a9 Y! o1 T0 f! }
· Be able to have 5 major error proofing solutions implemented. . @( p& {) l# ]* V. j
· Drive cost down that improves the Gross Margin. 9 `3 A/ x* V! e! A· Automation deployment.作者: ranica 時間: 2014-10-15 12:26 PM
COMPETENCIES: Weighted requirements list: (candidates should be or have the following) ("weighted" on a scale of 1-10, where 10 indicates the most critical, important and 1, the least): ' p) R! m) o( m/ R· Practical experience in multiple engineering disciplines, including Test, Process, Automation, Facility, MFG Engineering and Industrial Engineering. : 10' V+ S" a. H& x2 N
· LEAN Deployment Experience: 8 : P1 e$ y" Z1 d+ Y- `, h1 Z& O% S
· Hands On Experience in Facility construction: 6 0 \' ^$ G5 @0 e. H5 \5 g1 i! `" ?. [· Self starter, with a proven record of demonstrated initiative: 10 7 T: Q# ?6 a1 O$ y0 j
· Display a strong can-do attitude, determination and grit: 8 ' T% w/ n* x0 J; x
· High EQ: 8 ( R7 z, u) e' q! |% }+ @
· Collaborative, with the demonstrated ability to get projects done in collaboration with established teams and function/process owners: 87 p7 ~3 Q' \; P, @) L: b
· Ambitious: still in the upward arc of his/her career: 8 % P. V3 {; H; O· Pragmatic, with a good sense for finding high-impact applications: 8 4 d/ H1 H7 j6 P$ e' b' C, v. \! L
· Experience in one or more of these associated fields: precision optics, test and measurement, high-end electronics, semiconductors: 6 ) G1 v* j: q$ q4 B- [· Experience working with engineers in China, Taiwan and the US: 8 }1 T: A& K" t0 L9 }+ o· Fluent in English: 6 % T3 o8 {; [2 P
· Hands-on and detail-oriented: 6 2 O4 g8 d' @$ A: t/ e2 d" f
· Have strong program skills: 6 . ~: Q- G, A( k# y e. W· Have strong project management skills: 6 - I, {) T( Y5 u9 \! M
· Fluent in Mandarin and written Chinese: 8作者: ranica 時間: 2014-10-20 11:46 AM
Operation Director- {; L$ o, @# @ k
公 司:a leading developer of advanced digital imaging solution : f0 I; g6 [6 |( t/ L工作地点:上海0 }8 h/ _7 T4 r Z
- i' {+ N E e- F' G
Main Responsibilities: : [" X3 u# b* C9 c# C$ PCompany operation leader, to manage manufacturing and engineering departments, cooperate with other operational departments like Quality, logistics, production control, IE and supporting departments like HR, ADM, Facility and IT to meet company operational goals and objectives. To interface w/ R&D team in China and Product design, Business development team in US. ; |8 Y0 R1 J: v% v8 n: x
: m) k3 r2 T( r, n+ E' w1. Set up manufacturing and engineering overall goals and KPI based on company’s strategy and policy, : x' d( O- s' S# F/ K% U& B
2. Build operation team with good qualification, high quality and efficiency, Improve engineering and production staffs capability, develop and coach them to support company long term growth 6 m' O7 h* }. P4 j5 L$ V3. Lead and own operation safety and control. + [: e" S8 c9 F# J0 d: U. T! }4. Lead operation team to hit output target and quality KPI . v: H$ L; d7 u, s; g; D
5. Manage and improve product yield performance 9 \9 ?% @9 b" V6. Manage and Improve equipments performance and utilization 4 b, {( T# W* B1 y, O
7. Lead new product/equipment/technology introduction and development to meet requirement. $ { ^7 ?, \. t- U) I1 ?
8. Cost down by driving operation efficiency and reducing material cost : E% C: f" V1 W; K8 M% E" y/ `% \
9. Lead the operation process and system improvement 0 e* c3 P( Z2 U- _( g10. Lead the operation emergence response activities to ensure business continuity% l7 P9 r7 Z) Y" A3 I% q. ?8 k' Z: g
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Qualification & Experience: 2 e! X% N) Q3 G& X, z
1. Bachelor degree or above, majored in manufacturing or engineering relative; - h* m& A, |8 ?; t" v
2. At least 10 years related experience in Manufacturing or Engineering management in multi-national company; experiences of cross country cooperation % ~% j& R' \0 ~ K! S3. Experience to manage operation organization with hundreds of employees & t" \. X4 a! B7 J4. Semi-conductor industry experiences required, Assembly & test experiences will be a plus ' G! G" P7 s% P5. Familiar with operation management, knowledgeable in Planning, IE and finance, ) a0 ?; A: ]) n' B6 H
6. Experience to run operation with lean manufacturing principle 1 V3 ~! O1 C! `+ d& J! S5 d7. Excellent communication and coordination skills, credit and integrity, good team building skills. ) x1 Q7 K& Z2 a; Q# Y1 q. W2 }8. Good English skill both in written and oral.作者: ranica 時間: 2014-10-27 12:26 PM
Application Engineer" f1 l8 L! `1 z, a: @8 M
公 司:A famous IC company3 w# {# T* ]4 Q/ x) e
工作地点:上海 / ?6 s% A; s: I2 ~. n ) ~+ v2 V4 ?; Y" k0 r7 V4 w+ ?1 TResponsibilities: 7 h6 o% v6 u& Y8 j' A( ~# Q1 a1) Production Support ! E8 ~8 N2 Q# H
- Support new device ramp-up. 7 `% H: Y l2 s! v+ B& ]5 z7 F
- Application support (e.g. yield improvement, test time reduction) 0 j5 y; v; c" a$ Q" M- Production troubleshooting. + `$ g2 O! F# u W$ e- Customer training (customized workshops). ( H9 W4 M0 W2 f k1 l
- Account management: relationship building, issue tracking, escalation and communication. 1 H( w, M2 c$ ^7 r 9 X% x1 s& O+ d2) Pre-sale Support ) }8 M6 R2 Z7 z5 p* p* n) R- Understand market, device technology and competition trends, provide inputs to sales for Verigy product positioning strategy. 1 v3 g3 i: Y# }7 s( ~& P7 ~
- Collect local market / accounts / applications data, analyze and identify opportunities. , Z2 S0 Y: H7 d! f4 T- Understand customer’s technical problems, create and drive account penetration strategy. / a6 ?* M9 ^2 F0 `5 l ]- Support sales in technical discussions, theoretical benchmarks and customer presentations; help preparing proposal and tendering documents 7 f4 j: I$ t0 I' E( e" a
- Support marcom events like SEMICON show, seminars, etc.作者: ranica 時間: 2014-10-27 12:26 PM
3) Solution Development and Project Management 6 a! a9 ]( n! g7 T3 ^9 }* ?- Track account roadmap, analyze customer’s test requirements and provide competitive test solutions. I5 F N( ~/ n4 T, P& Q$ U- Test program development and project management. " X! Q h7 R4 h+ S7 J: s- Device correlation and test program release at customer site. 1 g2 J! Z+ k: Y$ F- J6 Q职位要求 ; H+ I, g4 f5 O) DMinimum Qualifications : Qualifications: . A; A) R) k8 t, e4 V- Demonstrated personal leadership skills & strong team contributor. 2 B' A8 L4 C D0 ~- Master degree or higher in electronic, electrical engineering, Automation or related discipline. 2 z; C4 s$ B1 Q$ ?/ S- K* R3 x C8 N
- Has more than 2 years Project management experience + M( A# i5 t6 X. C- 4 years experience in semiconductor test application development, application support, IC design, or test engineering. 2 T( W" @1 w1 R! _
- Familiar with C/C++, Java or other programming languages. 5 u; y F$ d' t* e o
- Fluent in English. ; ?( V6 d+ f7 \' n5 J2 w1 p9 G
- Good communication skills. " t7 z7 S/ ]. Z2 o9 N
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Preferred: k$ z T) D$ g- Y+ P- Knowledge in semiconductor design, manufacture and verification for SOC, logic, memory, RF, processors or ASIC devices. 7 J1 E% v: F( }! A1 r; ]- Experience in using Automatic Test Equipment platforms (for example, Verigy/Agilent, LTX, Teradyne or Advantest), especially in mixed-signal and RF applications. : m8 j9 {% _( K- s8 R/ @
- Pre-Sales skills and direct customer interface experience.