; y" E0 I$ Y. P6 B1 e$ g1 V2 b6 l4 g採用Aptina DR-Pix技術的Aptina MT9H004感測器 - X% Z( m% \2 O- U' b* y5 L 3 i' a$ t2 N* @- y+ ^) r) z為了滿足高階數位單眼相機(DSLR)和無反光鏡相機的性能和影像品質要求,設計人員需要這樣一種影像感測器:在較高ISO速度條件下能夠實現極低讀出雜訊,並且在較低ISO速度條件下能夠實現較高的全阱容量。透過增加一個畫素級雙轉換增益開關,Aptina DR-Pix技術在一種畫素設計中結合了兩種操作模式——在弱光場景中能實現更高敏感度和低讀出雜訊的高轉換增益模式;以及在明亮場景中能實現較大電荷處理容量的低轉換增益模式。 6 I V6 v$ t1 \9 z: c5 k9 y8 l3 k$ Y+ T$ A
透過Aptina的MT9H004感測器,弱光條件下可以使信噪比增加5dB——幾乎相當於調節相機鏡頭的兩檔光圈所產生的效果,並且不會對強光環境下(最多可以實現47dB信噪比)的性能產生影響。MT9H004的其他功能包括以10fps速度實現1600萬畫素靜態影像擷取、即時取景視訊支援以及1080p/30fps高畫質視訊錄製。作者: globe0968 時間: 2011-5-19 06:02 PM 標題: Apache Design Solutions Wins EDN Innovation Award SAN JOSE, CALIF. – May 5, 2011 – Apache Design Solutions, a leading provider of innovative power analysis and optimization solutions that enable the design of power-efficient, high-performance, noise-immune ICs and electronic systems, today announced that PathFinder™ was selected as the winner of EDN Magazine’s Innovation of the Year Award in the EDA Tools and ASIC Technologies category. PathFinder is the industry’s first comprehensive electro-static discharge (ESD) physical integrity solution targeted at addressing the increasing reliability challenges faced by nanometer designs. The award winners were selected by a combination of EDN’s worldwide audience of electronics engineers and EDN’s editorial staff. ; j0 J+ s& Z" C: ]2 g* ?' I- ~/ o, A# z, o. u z
“Apache is pleased to win this award for PathFinder’s innovative technology solution that provides both layout-based ESD sign-off at the full-chip level and Spice accurate transistor-level dynamic simulation for circuit level macros,” said Dr. Andrew Yang, chief executive officer of Apache Design Solutions. “Over the past eight years, five of our products have been selected as finalists, and three of them have taken top honors, including RedHawk for full-chip dynamic power integrity, CPM for chip-package convergence, and now PathFinder.”作者: globe0968 時間: 2011-5-19 06:02 PM
About PathFinder . U% ?' T. k1 Q0 h' G* K6 pPathFinder’s full-chip capacity and layout-based GUI environment enables designers to perform early prototyping, circuit optimization, and ESD sign-off for Human Body Model (HBM) and Machine Model (MM) events. Based on integrated modeling, extraction, and simulation capabilities, PathFinder addresses the limitations of manual design validation processes and methodologies by automating the process and enabling exhaustive testing of every device and wire that can potentially fail from an ESD event. PathFinder helps designers identify the most vulnerable area of the design to meet their ESD guidelines and improve product yield. ) ?- C$ x' u1 L 5 X: n s( e5 e1 m: h/ i4 k. v For circuit analysis of I/O, analog, and mixed-signal design, PathFinder also offers the industry’s only transistor-level dynamic ESD solution for validation of Charged Device Model (CDM) events. It efficiently simulates large-scale macros, including the impact of clamp’s snap-back characteristics, power/ground and substrate networks, and package parasitic with convergence property.& Q* [3 K: A2 k2 T
* g" u7 a7 V5 \6 P! D* l) }9 |To learn more about Apache’s EDN Innovation Award winners, PathFinder, RedHawk™ and CPM™, and the rest of Apache’s portfolio of products that help advance low-power innovation, visit us in booth #2448 at the upcoming Design Automation Conference (DAC), June 5-10, 2011, at the San Diego Convention Center in San Diego, California. Meet with our Power Team Experts to learn how Apache’s Power Budgeting, IP Integration, and Chip-Package-System (CPS) solutions can help meet your low-power requirements and reduce costs.