New Fast Switching Power Semiconductor Devices
Limits and Enabling Technology for System Engineering
Speaker: Dr. Leo Lorenz (IEEE Fellow, Infineon Technologies, Munich)
Leo Lorenz was born in Haibach, Germany, in 1946. He received the Dipl.-Ing. degree 
from the Technical University of Berlin, Berlin, Germany, in 1976 and the Dr.-Ing. degree from the University of Federal Defense, Munich, Germany, in 1984. From 1976 to 1980, he was with AEG, R&D –Center for Power Electronics, Berlin. In 1984, he joined Siemens Semiconductor Division which became Infineon Technologies AG, Munich, Germany, in 1999. Since then he has worked on power semiconductor and power ICs in different functions and responsibilities. He has published over 200 technical papers in these fields. In 2001, he became a Professor for system integration at the University of Ilmenau, Ilmenau, Germany. Dr. Lorenz is President of the ECPE (European Center of Power Electronics)
Abstract:
System Integration, high power density system designs along with a continuous improvement in efficiency ratings are the driving force for the progress in power converter technologies. New system trends are going towards high switching frequencies reducing or eliminating bulky electrolytes and ferrites as well as multilevel or soft switching topologies for higher efficiency and low harmonics.
In many fields of applications then are huge requirements towards high system dynamic response, overload capabilities, device ruggedness and build in reliability. Further on there is a tendency towards elevated operating temperature and outstanding short circuit ruggedness.
To control the energy flow precisely and high efficient from the source up the load the key components are IGBT´s, Super Junction Devices, low voltage MOSFET´s and SiC. Beside the chip development a more significant attention is being paid to packaging technologies, chip contacting and interfacing technologies to meet the requirement towards device ruggedness, system compatibility and reliability. Considering the roadmap for silicon device developments the key point in the future will be how manage the interference of device and system parasitics, thermal issues and the extreme fast switching speed.
Agenda
1.Basics and latest development in IGBT´s, fast switching Diode, Super Junction devices, low voltage Power MOSFET and SiC component
2.Dynamic performance, overload capabilities, short circuit behaviour and device limits
3.Device parasitics and management in application
4.Driving and protection circuit topologies
5.Power losses and thermal management
6.Development trends
Date：Sept.14, 2010 (Tue）9：00～12：00 ,13:30～16:30
Venue：清華大學資電館B01教室
Room B01, EECS Building, National Tsing Hua University, Hsinchu
Registration Categories / Fees：
1.Regular：TWD $5000
2.IEEE member：TWD $3000
3.Student：TWD $3000
4.IEEE student member：TWD $2000