8:30 | 報到 |
9:00 | Session 1: SmartFusion Family and Design flow Introduction Rajiv Nema, Sr. Product Marketing Manager, Mixed-Signal FPGAs |
- Overview - Design Flows - Demo: Design Flow Demo and Tool Bring Up ; D* y* B( Y" M2 _ - Embedded Design Flow | |
10:45 | 休息 |
11:00 | Session 2: Leading 32bits MCU Development Tool – KEIL MDK Leon Chen, FAE, ARM Taiwan |
11:45 | Session 3: Designing with SmartFusion I Kevin Wen, Sr. FAE & Processor Specialist |
- Microcontroller Subsystem (MSS) - I/O Multiplexing | |
12:30 | 午餐 |
1:30 | Session 3: Designing with SmartFusion II Kevin Wen, Sr. FAE & Processor Specialist |
- Demo: running Sample Designs | |
2:00 | Session 4: Analog Design Felix Chen, FAE |
- Analog Compute Engine (ACE)+ N9 L# y2 }7 f/ a0 V! }+ l5 Z - Demo: Reading POT values and displaying on HyperTerminal | |
3:30 | 休息 |
3:35 | Session 5: FPGA Design Kevin Wen, Sr. FAE & Processor Specialist |
- Demo: Adding peripherals into the FPGA fabric | |
4:30 | 會程結束 |
演講嘉賓:愛特公司美國總公司資深產品市場經理Rajiv Nema,以及ARM台灣分公司FAE工程師 Leon Chen。 請造訪 http://www.actel.com/company/events/SmartFusion_seminar |
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