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標題: 請教90/65奈米,SOC Tape-out一次NRE大約多少 [打印本頁]

作者: ajack    時間: 2009-8-13 10:26 AM
標題: 請教90/65奈米,SOC Tape-out一次NRE大約多少
如題
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請教業界各位先進5 |% T7 I7 Q( y5 C2 X( `6 c2 H) V
目前的chip開發,需要多少投資?
* O+ _1 z9 c; t+ [- j  Z首先是假設 Febless design house.
) l8 t: D4 X! O3 i自家由algorithm 到 RTL simulation 完成
' h. R: {$ I( f/ b# e, v後端包給 backend service 公司 (layout, mask, Fab, assembly..)
7 D+ r1 k9 N$ a( s7 M以 ARM9 or ARM11, AMBA2.0 為platform' Y5 [7 [! x7 y7 V+ t
那麼$ J7 f2 e4 M8 U
  (1)90奈米, NRE大概多少?* C. U) o. F7 i
  (2)65奈米, NRE大概多少?* k8 Q  }( B7 H) q% X
  (3)或是您知道其他製程, NRE大約多少...
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謝謝
作者: elroy216    時間: 2009-8-14 01:17 AM
Which design service company you will go to?
9 a7 |( N6 g* R9 D* h9 o/ kHow many mask layers it will be?% d& y. `" \0 ?% a* O6 `% m( J6 v
Besides, ARM, any other IP, like DLL / PLL / EDRAM / USB / LVDS..... and who will be the IP provider(s), wafer Fab? design service companies? or 3rd parties?) |' y4 |  U2 B. D7 F
How many chips you need? A full set mask or MPW?
% v/ Y5 x6 _% DWhat package you need?
作者: ajack    時間: 2009-8-14 08:59 AM
Well,
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I just estimate the investiment of a ASIC team.
4 @5 V' e9 c+ _2 P: Z; K9 dnot servey for a project.* e. B: ^# l( H; x+ C( R% K; K7 W
So, I just want to know the range of NRE.- G+ g8 U+ K/ i2 F' I( Q3 {# X
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For example, It will be , i4 b9 I# X- q: V
(1) 5,000,000 NT$ ?- F/ w& |( v0 `
(2) 8,000,000 NT$ ?
0 I$ u! i& N! P: T(3)10,000,000 NT$ ?
! a  t) S7 X- o1 C(4)12,000,000 NT$ ?: s3 S% E8 S; c* Q( I3 L
(5)15,000,000 NT$ ?! T! X! s1 C/ e2 C4 z
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Sure, I understand following things:
8 x3 H( o* n3 a+ b" p7 f7 R/ _" Y - full set mask cost more% q  I/ H( Q+ g5 y! i% \' L9 w
- PLL/LVDS... analog IP are extra cost
" l4 V0 R7 d$ D7 ` - pin-count and area also influence cost
" t* z0 s: W9 G% y) y - different package also cost different
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Therefore, if really need information for estimate,
1 k5 A! \- q/ qjust for example.
! P2 g' [/ ?7 C) h7 k$ _Let's assume a SoC for FullHD TV application7 {2 e1 e* h7 o  y$ j
it will include' `- q7 |4 k/ {" f4 N& ^3 t
  - ARM AMBA1 D1 W# i+ }0 ^' S9 S. a
  - DDR2 I/F: q6 l" F# k  O% Y& J# B
  - GPIO, IIC,...
: `( v1 \- O7 d/ i5 Z9 a, j, v  - LVDS out (dual link)( d3 [. e8 K+ S/ J* J- d
  - Video-in: HDMI(1.2)x2, VGA, YCbCr, A/V, S-V, SCART,: G! {- \6 N* w  I2 f' |* h
  - 12bit ADC, 10bot ADC x2
4 D+ W& {; a5 n9 x4 m" F  - PLL/DLL' f* i* L$ w( |* E  f
  - 256 pins 以上
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1 g, ]) t" Y( W+ Q, }8 @1 uThan,... any idea about NRE fee?+ y) e" w8 Z7 @# e2 c
again, I just want to know the range
作者: alex3010    時間: 2009-8-14 09:25 AM
if the ARM and AMBA is hardcore,* W4 o( r- _) n) N- l+ O
basically 65nm-->USD$1M above and 90nm-->700K above
, q# L* f% C3 c  Z7 R8 b7 Z6 pand base on different foundry has difference price!( a8 [. |, P3 E! H
this price did not include any specific IP like TV encoder, decoder, vedio codec....
3 I4 \3 V6 F3 [and did not include the ARM licensee...
' A4 R; E" e- h+ \% ~actually! it is not so much IC design in Taiwan tape out 65nm till now!
作者: alex3010    時間: 2009-8-14 09:28 AM
sorry, this price also did not include the shuttle or pilot run wafer(basically in 65nm will be USD$3xxx at 13pcs wafer)! Y; j  z4 J/ i, F
and package&testing, so you may count it at USD$1.3~1.5M if you are running turnkey solution!
作者: semico_ljj    時間: 2009-10-22 11:06 AM
need 1M dollar?
作者: hkgcrcom    時間: 2009-12-15 09:05 PM
標題: 今天天氣不錯!
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