標題: IEEE Std 1149.1-2001 Test Access Port and Boundary-Scan Architecture [打印本頁] 作者: michaldl 時間: 2009-5-15 04:04 PM 標題: IEEE Std 1149.1-2001 Test Access Port and Boundary-Scan Architecture Sponsor ) Q% ` W- E- {Test Technology Standards Committee of the IEEE Computer Society 4 A& n- i- A1 }, eApproved 14 June 2001 - S; C- q3 P, eIEEE-SA Standards Board5 f' a/ ^! D/ T2 B6 l
Abstract: Circuitry that may be built into an integrated circuit to assist in the test, maintenance, and & ?7 B0 J. a2 @% T8 Dsupport of assembled printed circuit boards is defined. The circuitry includes a standard interface 5 H. n5 w7 M/ @! u2 t5 W; M( zthrough which instructions and test data are communicated. A set of test features is defined,* y5 M0 D2 p* p+ y& K1 f
including a boundary-scan register, such that the component is able to respond to a minimum set1 F& ?/ S+ }6 W
of instructions designed to assist with testing of assembled printed circuit boards. Also, a language 1 Q# L" t( y H0 Qis defined that allows rigorous description of the component-specific aspects of such testability features. # T$ W8 L% w0 i8 D/ O/ W9 r) [# [ " N* x; W2 _( M8 v7 qKeywords: boundary scan, boundary-scan architecture, Boundary-Scan Description Language,( `4 Y1 ]6 ^7 E' ]- V1 j) Q) E
boundary-scan register, BSDL, circuit boards, circuitry, integrated circuit, printed circuit boards, ) @' p; V+ T* ]7 k* XTAP, test, test access port, VHDL, VHSIC Hardware Description Language7 j! v# Y+ U9 i5 [3 y! c
& ]2 o3 O6 M5 |# } 作者: madsilly 時間: 2009-9-4 03:00 PM
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